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Design And Verification Of SoC Loading Program Wirelessly System Based On OR1200

Posted on:2018-11-06Degree:MasterType:Thesis
Country:ChinaCandidate:C HuangFull Text:PDF
GTID:2348330518484920Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
SoC(System-on-chip)refers to integrate a complete system on a chip and now is one of widely used method of design.SoC design is not a kind of technology that is based on the functional circuit but on the Ip core.So if IP core could get reusing,it will be conductive to the improvement of circuit's efficiency,cost savings,increasing system functions and reducing the error rate and so on.Common SoC systems typically include processors,buses,storage modules,clock modules,and peripherals.For Soc design,after setting up a good environment,there must be a corresponding set of IDE development tools,including PC which could support the development environment,circuit boards and cables.After the development is completed it would be applied to the embedded field and it is generally difficult to support secondary development.If under secondary development it is enslaved to the development environment of the PC terminal,circuit boards,cables and some other conditions.Therefore,this paper proposes a method of OR1200-based wireless intelligent program to load the SoC design scheme,which makes the chip can realize the secondary development conveniently,get rid of the constraints such as PC terminal,development board and connection line with development environment,to improve utilization and simplify the secondary development process.The OR1200 is a subproject of the OpenRISC project which is an open source project.It is a Harvard architecture and is a 32-bit RISC processor with advantages such as free,open source,simple,low power and scalability.Performance is equivalent to the performance of ARM9.In this paper,OR1200-basedSoC program loading system includes at least the processor,read-only memory,bus arbitration module,serial peripheral interface,memory module,universal asynchronous transceiver transmitter,clock module.Wishbone bus arbitration uses a round robin mechanism to access master and slave devices.This article changed the traditional way that when burning the next program,previous program will be covered.To solve this problems the flash is divided into three program areas.When burning flash,put different programs in different program areas.When starting from the SPI flash,the program pointer first point to the read-only memory ROM inside the Bootload area to complete the program from the flash copy to memory,and then start from the memory instruction to achieve the system's self-starting.In addition,this design on the basis of this increase the function of the Bootload,that is not only to complete the program copy,but also to monitor the serial port,according to the order received choose one of these programs to copy to memory.So that when the chip is packaged,we could load the program without wiring and corresponding IDE software,but just through the phone or a Bluetooth module to load different programs,this design would have a good application in the field of intelligent terminals.SoC-based wireless intelligent program loading method steps are as follows: set up the SoC system;load the boot code into the read-only memory;divide flash memory and load different programs;initialize the serial peripheral interface and universal asynchronous transceiver,copy the choosing program in flash memory to the computer memory;execute the jump command,point the processor to the beginning of the memory module to achieve the system's self-starting.Through terminal of Bluetooth function it send different commands to select the different program in flash area to loaded into the computer memory module and achieve different procedures loading through the wireless control.This paper not only describes an OR1200-based SoC program loading scheme,but also achieve the design of this program,after the EDA tool synthesis and simulation,we test the program in the Xilinx development board.
Keywords/Search Tags:IP reuse, RISC processor, loading program wirelessly, chip utilization, system start up
PDF Full Text Request
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