Research And Design Of HART Communication Controller

HART protocol is the shortened form of addressable remote transmitter data channel protocol,which is proposed by Rosement,America in 1985 and used for the two-way communication between a field of intelligent instrumentation and control room equipment.The FSK(frequency shift keying)modulation and demodulation technology is utilized in HART protocol for physical layer,which overlays a 4mA-20 mA analog signal on the superposition of a 0.5mA average value of 0 digital signal to 1200 Hz and 2200 Hz AC signal,respectively,instead of the digital signal " 1 " and " 0 ",so that analog communication and digital communication can proceed simultaneously without interfering with each other.HART is regarded as a transitive commodity from the analog system to the digital system,so it has a enhanced market competitiveness and has been rapidly developed up to now.The paper presents a HART protocol chip based on foreign technology design,through reverse analysis method,referring to the HART protocol standard.First,the chip and digital logic gates are identified using the Chip Logic netlist extractor,and connecting the devices and logic gates according to the network.And then according to the chip instruction manual,each functional module circuit diagram should be cleared up.When the circuit is cleared up,the deep-rooted analysis through the entry level to the RTL level is rather difficult and is greatly time-consuming as well.This paper presents a deeply-rooted analysis method that can analyze the digital circuit in a group-sorting way,which can greatly reduce the analysis time.Finally,the domestic process is selected according to the theoretical knowledge and combined with the instructions of the circuit for the process of transplantation,the simulation and verification will be implemented thought relevant software modules,and some of the original design requirements of the module will be redesigned.After each module is verified by simulation,all the modules need to be connected and then the whole simulation is verified.Through the early circuit extraction,the latter function arrangement and the analysis of the functional modules,the whole HART protocol chip is divided into three parts,including modulation circuit,demodulation circuit and common circuit.The three parts are the key parts of the whole circuit,so we must focus on the analysis of the three functional modules.After the analysis of the whole circuit,the domestic HHNECGE 0.35?m process will be used for the entire process of transplantation.Use the simulation tools such as Hspice,Modelsim and ADMS modular simulation to perform various tests as well as modular mixed simulation analysis of the modulation circuit,the demodulation circuit and the whole circuit.The simulation results meet the HART protocol standard,so each function module is working properly,power consumption is about 260?A.the area of the assessment.Finally,the layout area is assessed,the area is about 4000?m × 4000?m,and the assessment result is only as the reference of the final design of the area.