Research On Tracking Loop Of Beidou Navigation Receiver B1 Signal And Implementation Based-on FPGA

With the rapid development of satellite navigation system and the constant pursuit of high performance of real-time and precision,the tracking part of baseband signal processing plays a more and more important role in navigation receivers.Especially in recent years,China's independent research"Beidou ?" satellite navigation system has been improving.In this paper,the carrier tracking loop and the code tracking loop are analyzed and designed according to the D2 navigation message of "Beidou ?" B1 frequency signal.Firstly,the direct spread spectrum communication system and the structure and characteristics of the Beidou B1 signal are introduced.In this part,the principles of modules in the Beidou navigation receiver are analyzed.Then the structure and principle of phase-locked loop and frequency-locked loop are introduced in detail.According to the characteristics of the Beidou B1 signal,the carrier tracking loop is designed as a second-order frequency-locked loop-aided third-order phase-locked loop.The Q-channel signal to multiply the symbol of I-channel signal is adopted as carrier phase discrimination algorithm.Also,cross-product frequency discrimination method is adopted in frequency-locked loop.Afterwards,the design of code tracking loop is analyzed.According to the principle of pseudocode phase to determine the pseudo-range,the delay-locked loop is studied.In the code tracking loop,dual-channel and non-coherent early code minus late code amplitude phase discrimination algorithm is adopted.And then,the carrier loop is used to eliminate the dynamic stress of the code loop.Finally,the code tracking loop is combined with the carrier tracking loop to conform a complete tracking loop of satellite receiver and the tracking loop is simulated by Matlab.The tracking loop designed in this thesis for FPGA verification is performed based on the thought of modularization.After evaluating the logical resources needed to implement the tracking algorithm and selecting the appropriate chip,design and verification of each module are developed using Verilog HDL.Then,the whole loop is verified,and the results of the verification show that the design can track the Beidou B1 signals successfully and proves the correctness and feasibility of the design.