Design Of Frequency Turn-able Oscillator Based On 90nm Process With LDO Driver

With the rapid development of integrated circuits,the requirements of chip clock frequency accuracy are getting higher and higher.The accuracy of the frequency source can determine the quality of a sequential circuit design.Especially in today's high-speed integrated digital circuit,a small clock error may lead to confusion of the overall cycle,making the digital circuit timing disorder.Therefore,the oscillator as a representative of the frequency source in integrated circuit has become a concerned research topic.This paper first introduces the three much common oscillator used in the integrated circuit in the application,which are crystal oscillator,ring oscillator and relaxation oscillator.And then the paper analyze their structural characteristics and the principle of the workers one by one.This design is based on the TSMC90nm process to design a frequency adjustable trimming oscillator,and also design a low-power linear regulator to drive the oscillator.In this paper,the design principle of the linear regulator is described in detail.A plan of the low power consumption and the economical area size is proposed with its own characteristics.Then it is verified by simulation,and a reliable voltage regulator with output voltage of 1.2V is obtained.The results of simulation show that the linear regulator has a load regulation of 3.64%and its power supply rejection ratio of-63.4 dB.Then,I complete the overall structure of the oscillator circuit design and sub-module circuit design according to the design requirements.And a detailed description of how to control the port by trimming to get the desired output oscillation frequency is proposed.By adjusting the control port,the output frequency coverage reaches 284%to 61.5%of the default value,and the simulation data verifies that the oscillator,which is initially set to 48MHz,can be found in such a large range.Then in order to ensure the reliability of the output clock,paper also specifically discussed its phase noise,simulation results measured phase noise up to-101.128dBc/Hz@1 MHz,and-121.806dBc/Hz@10MHz.Finally,this paper draws out the layout of the linear regulator and the oscillator,and carries out the back-up verification,the simulation results meet the design requirements.