Design Of Application Code Compression Scheme For Low Power Embedded Systems

With the technology of computer application and power battery manufacturing process,power consumption has become an increasingly prominent problem in embedded system.Dynamic Voltage Scaling and Dynamic Power Management were widely used to realize the low power consumption of embedded system from the aspect of adjusting supplied power voltage and clock frequency which will reduce the system performance recently.After analyzing the components and influencing factors of the power consumption,another method of reducing the power consumption in embedded system was proposed,and will not affect the overall system performance.We merged and segmented the specific instructions after analyzing the code characteristics and instruction statistics of most applications.The Canonical Huffman algorithm was used to generate the look-up table index for the modified instructions and the original instructions.Finally,according to the relationship between the index and the instruction in the look-up table,the target code was compressed.We applied post-cache structure in decompression scheme,thus the decompression process will not dissipate much power.The problem of the branch instruction and instruction byte alignment were also solved.Experiments would be implemented by SimpleScalar simulator.In accordance with the design scheme,we modified the simulation program to be able to compress part programs of the embedded benchmark test and calculated the average 57% compression rate and 41% power consumption reduction,statistics results show that the proposed method was more efficient to save storage space and reduce system power consumption than compression scheme without pre-processing.According to compression scheme and results,We used Verilog HDL language to simulate the decompression realization process in the Quartus II platform,the experimental results showed that with the decompression module can decode the codeword in the approximate one instruction pre-fetch cycle,which will testify the rationality and feasibility of designed decompression module.