High Speed Data Processing Of FPGA Based On Scopecorder

With the rapid development of electronic information technology,data processing equipment has been widely used in various fields.At the same time,people's requirements on all aspects of data processing are also rising.The ScopeCorder is a powerful data acquisition system that synchronously measures multiple combinations of electrical and physical signals;it is also a recording system that captures and analyzes transient events,records and displays historical events.At present,China does not have the ability to generate the ScopeCorder,mainly rely on imports.It is of great practical significance to research and develop the ScopeCorder successfully,master its key technology and improve the ability of independent research and development.How to capture high-speed data in the case of variable channels and variable sampling rates and realize their real-time recording is the core technology and reserching difficulty of data processing design of ScopeCorder.This paper is mainly based on FPGA as the core of the signal processing board for the hardware platform to achieve high-speed data logging recorder processing.Based on the functional requirements and technical indexes of the ScopeCorder,this paper constructs the high speed data processing framework of the ScopeCorder.And then the multi-channel data acquisition and real-time recording of two technical difficulties in-depth analysis.For the channel acquisition module design,to deal with the chanel number is 1 to 128 variable and the sampling rate is 25KS/s to 100MS/s of the input data,in this paper,we adopt a unified scheme to process data according to the maximum channel number 128 and the maximum sampling rate of 100MS/s..And then each channel's data is serial-to-parallel by 200 M DDR ISERDES,and then according to different time base corresponding to the different pumping point coefficient of the collected data to do point processing.Finally,the acquisition module will collect the data for three data acquisition mode data processing.The three acquisition modes are normal acquisition,peak detection mode and high resolution mode.For the real-time recording module design,this paper uses the same method to deal with the chanel number is 1 to 16 variable and the sampling rate is 100KS/s to 1MS/s of the overall program.And then using the ping-pong operation of DDR2 SDRAM to achieve high-speed data real-time cache,and solve the high-speed data between different modules rate matching problem.Finally,this paper uses the local interface for the 50 MHz clock PEX8311 implementation of the PCIe protocol,to achieve the communication between the signal processing board and the host computer.In this paper,I use signal processing board as the core to build a test platform,and use it for functional verification.Multi channel acquisition module's 200 M DDR ISERDES and 100MS/s sampling rate data input data acquisition mode have both been successfully verified;real-time recording module's based on DDR2 ping-pong switching operation and PCIe read and write functions in the case of 50 MHz local interface clock have both been successfully verified.