| Near-field antenna receiver is one of the indispensable test methods in the development and production of antenna test system.The near field antenna test is to assess the far field characteristics of the antenna to be measured by receiving and processing the sensor of the probe feedback signal in the vicinity of the antenna, which measures the amplitude and phase distribution of the antenna at a discrete point of a regular surface .In the process of radar antenna research, the signal processing is a very important part, and with gradually improvement of digital signal processing technology ,It was found that the digital processing of radar signal in the IF frequency band using digital IF processing technology is unmatched by many analog circuits.The purpose of this thesis is to apply digital IF process technology to the IF signal process of near-field antenna test system, for the characteristics of the antenna signal,using high-performance FPGA devices to design a fully digital antenna IF process-system.Firstly, the thesis introduces the measurement method and system structure of the two-channel near-field antenna measurement system. Aiming at the accuracy requirement of amplitude and phase measurement of IF signal in the measurement system, combined with the related technology of IF signal processing to design an IF signal processing based on all phase FFT algorithm (apFFT).Secondly, this thesis focuses on the principle and experimental demonstration of the the truncation effect caused by the spectral leakage. By apFFT,it has a good suppression, and combines with this feature to further elaborate the apFFT algorithm has a great advantage over the traditional FFT algorithm in digital signal spectrum analysis and parameter measurement accuracy.Thirdly, according to the theory of algorithm ,this thesis adopted the classical digital down-conversion(DDC) signal processing structure to implement the IF signal processing circuit based on apFFT algorithm by the FPGA hardware logic.So that the dual-channel receiver can accurately obtain the antenna signal amplitude ratio and phase difference test data.Finally, according to the requirement of antenna array scale or batch test, the thesis designs the data cache management of large capacity test data based on DDR3 SDRAM,and realizes the working mechanism of hardware and software processing for baseband data and amplitude data.Through the near field antenna test receiver module testing and improvement of the functions, the correctness of the design of the thesis has been verified by making the field test and simulation field test of the whole system, and now achieves the expected design goal. |
