Design Of RF Front-End Circuit For High Sensitivity RFID Tag

As a kind of remote automatic identification technology,ultra high frequency radio frequency identification(UHF RFID)is widely used in many fields due to its high recognition speed,long service life,large storage capacity and high reliability.Tag chip is an important part of RFID system,and the sensitivity of tag chip is related to the recognition distance of RFID so that it has become an important target which must be considered in IC design.The working frequency of the RF front-end circuit for UHF RFID tag in this thesis is about 900MHz,and the circuit consists of high sensitivity RF-DC voltage doubler rectifier,low power reference voltage generating circuit and low power low drop-out linear regulator.The circuit can convert the received RF energy into DC voltage through RF-DC rectifier and provide it to the secondary circuit through the regulator.The sensitivity of RF-DC rectifier is less than-20dBm,while the rectification efficiency is greater than 30%.The power consumption of the whole circuit is less than 4?W,while the area of the whole circuit layout is less than 0.1 mm~2.The main research work is described as follows:(1)The structure and basic principle of passive UHF RFID RF front-end circuit is introduced in this thesis firstly,while basic principle,circuit structure and key parameters are analysed in the meantime.For RF-DC rectifier,the output voltage formula of rectifier with power source input is fitted by MATLAB,and the effects of input power,load,conduction resistance,as well as threshold voltage for output voltage and efficiency are analyzed in the meantime.(2)The schematic of each module is designed,and pre-simulation results and analysis conclusions are given in this thesis.CMOS threshold self-compensation technology is used in RF-DC rectifier to eliminate the dummy and improve the sensetivity and efficiency.In the meantime,sub-threshold technology of MOS transistor is utilized in voltage reference and LDO to achieve ultra-low power consumption.(3)The layout of each circuit module is completed,and post-simulation results are showed.The design is based on SMIC 180nm standard CMOS process,and the EDA tool is Cadence IC5141.The simulation results show that,when driving 1M? load,the ouput voltage of rectifier in this thesis is 1.3V,the sensetivity is about-23dBm(5?W),and efficiency is about 33.53%.The output voltage of reference volatge source is about 530mV,and its temperature Coefficient is less than 40ppm/? in the range of-20??100? with the quiescent current less than 100nA.The output voltage of LDO is about 1V,and the maximum output current is about 100?A with the quiescent current less than 300nA.The area of whole chip is about 0.88 mm~2,and the power consumption for post simulation is around 3.82?W.The results of pre and post simulation demonstrate that all the performance of RF front-end circuit meet the design requirement.