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Aging Research And Protection Of Radiation Hardened SRAM Cell

Posted on:2018-04-26Degree:MasterType:Thesis
Country:ChinaCandidate:D P FanFull Text:PDF
GTID:2348330512979936Subject:Microelectronics and Solid State Electronics
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SRAM Radiation Harden Circuit requires high reliability and long life support as the special application scenario. Bias temperature instability caused by aging has become a major threat for the life and reliability of the memory circuit. The BTI effect causes shift of threshold voltage of the transistor, which leads to the asymmetry of the SRAM cell.Ultimately the degradation of the noise margin leads to the failure of the read and write function. Anti-aging design usually focuses on system level or storage strategy to balance the SRAM unit, and uses extra redundant storage unit as a cushion for SRAM life. These strategies could only delay the process of aging. However, due to the characteristics of the redundant storage nodes, the radiation hardened SRAM unit provides a new way for structural SRAM aging resistance. Therefore, in this thesis, the aging characteristics and structural method of aging resistance for radiation-hardened SRAM cells were mainly studied.In this thesis, the DICE (dual interlocked cell, DICE) storage cell was studied. In order to get specific influences of BTI aging effect on the performance of SRAM as well as the structural anti-aging design scheme to prolong lifetime, aging characteristics of DICE unit are analyzed though SPICE simulation. The result shows that due to aging aggravating read disturb and half select disturb, the stability and lifetime of DICE structural SRAM unit deteriorates severly. By controlling the additional transistor added between access transistors, the pathes of connected storages node were blocked. The read disturb and half-selected disturb were eliminated. Simulation results show that the ability of anti-aging was improved. The experimental results show that the 22.6% reading failurerate after 108 s aging was avoided, thus greatly improve the reliability of the DICE unit.The static random access memory QUATRO (quad-node ten transistor cells, QUATRO)unit was alos analysed in this thesis. The read stability and write stability under the influence of BTI has obvious degradated, but as write noise margin of QUATRO is much higher than the read noise margin, preventing the failure of reading is still the primary goal. In this thesis, by using the characteristics of QUATRO unit redundant nodes, by transfering read and write ports, the failure of aging was avoided. Experimental resultsshow. 4.1% reading failure rate after 108s aging was avoided, thus greatly improve the reliability of the QUATRO unit.
Keywords/Search Tags:DICE, QUATRO, BTI, read disturb, combating aging
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