CPADSE:A Technology Of Accelerating The Microprocessor Design Space Exploration

In order to accelerate the microprocessor design process, designers have to quickly find out the optimal design parameter configuration to meet the design goals in the pre-design phase. Microprocessor design space exploration is to run a variety of workloads under a number of various parameter configurations to achieve the above objective. However, the increasing design complexity and number of design parameters have led to a low efficiency of design space exploration.In order to improve the efficiency of design space exploration, this paper has proposed CPADSE——a design space exploration technology based on critical path analysis and parameter sensitivity analysis. The technology consists of exploration algorithms, critical path analysis and parameter sensitivity analysis. The main work and innovation of this paper are as below:1.In allusion to the defect of traditional exploration algorithms that can not guide the design optimization, this paper has proposed to utilize critical path analysis and parameter sensitivity analysis to guide the Simulated Annealing(CPA-SADSE) or Tabu search(CPA-TBDSE) for the design space exploration. It utilizes Critical Path Analysis to identify the key factors that restrict the performance improvement at the current parameter configuration, and then adjust the parameter configuration according to Parameter Sensitivity Analysis to achieve a design optimization. This method can efficiently guide the simulated annealing or Tabu search to choose a new better design point, which can reduce some extra simulation iterations to some extent.2.In allusion to the problem of scale and accuracy of simulation, this paper has proposed a backward algorithm for critical path calculation which is based on the executing trace of instructions. The executing trace of instructions is firstly generated via the simulator to construct the dependence graph. Then utilizing the backward critical path calculation to identify the executing time of the programs and various events that influence the microprocessor performance. This algorithm aims to find the latest incoming edge using a reverse order. Compared to the existing algorithms, it does not need to load the whole dependence graph to the memory, which can help save much memory. Therefore, this method can manage more instructions to increase the scale and accuracy. If the size of the dependence graph is M1 and the size of small dependence graph that is load to the memory every time is M2, this algorithm can save M=M1/M2 times of memory.3.In allusion to the problem of design space expansion, this paper has proposed to utilize PB design to reduce the design space and then reduce the exploration complexity.It utilizes PB design to identify the parameters that have significant effect on the performance, which is used to guide reduce the design space. For the rest parameters, it uses the single parameter sensitivity analysis to find a optimal value. This technology has been applied to CPA-SADSE and CPA-TBDSE.Experiment results have shown that, the proposed CPADSE can improve the search efficiency to a certain extent, then accelerate the design space exploration. On average, CPA-SADSE obtains 1.7x speedup over the design space exploration based on the traditional simulated annealing(SADSE), and CPA-TBDSE obtains 2.1x speedup over the design space exploration based on the traditional Tabu search(CPA-TBDSE).