Font Size: a A A

The Implementation Of T-MMB Receiver Demodulation Algorithm Based On FPGA

Posted on:2011-01-21Degree:MasterType:Thesis
Country:ChinaCandidate:B MaFull Text:PDF
GTID:2178330338983660Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
As the development of society and information technology, users want to access to the multimedia service wherever and whenever, so the mobile multimedia equipment comes out, the timely introduction of the standard of Terrestrial Mobile Multimedia Broadcasting is to speed up the domestic mobile TV industry.This paper makes a further research on the synchronization and demodulation algorithm in T-MMB, and analyzed the way to implement the algorithm on FPGA. During the research on FPGA, we should get a general consideration of recourses usage and the shortest clock cycle, investigate algorithms that are fit for the implementation on FPGA, or that are suitable for implementation after being improved. In addition, we should synthetically consider the whole performance and the functions of each module.Finally, this paper proposed a series of solutions to implement T-MMB digital receiver scheme based on FPGA, including frame synchronization, joint estimation of frequency offset and symbol timing, estimation of integral multiple frequency, symbol fine timing and general control connect unit. The frame synchronization unit, this comprehensive analysis of Standards of the frame structure and hardware resources, a new algorithm, were cumulative the absolute value of I, Q data, through a new energy detection methods to identify data frame header, the ultimate realization of this function with the FPGA. Joint estimation unit is to use the autocorrelation of cyclic prefix and data autocorrelation, using the maximum likelihood estimation algorithm to estimate the size of the frequency offset and symbol timing position. Integer frequency offset estimation unit, symbol timing unit use the cross correlation between the reference phase transmitter and receiver known symbols of reference to implement.The receiver was designed and implemented the algorithm for FPGA hardware resources structure, combined with Lyrtech development platform related technical parameters, considering the T-MMB standard in the base-band rate and the overall system delay, it gives the design and the simulation results, by analyzing the occupancy of each module of the resources to arrange the system's overall layout and reusing resources, the timing of the report of each module to discuss the module system, the maximum frequency can meet the technical requirements to achieve the ultimate in the receiver FPGA machine synchronous demodulation function of the whole system.This paper proposes a method in the design of T-MMB synchronization receiver with explorative analysis and discussion and implements the function of baseband signal synchronization and COFDM demodulation based on T-MMB standard on the Lyrtech platform. This paper has some reference meaning and practical significance in T-MMB equipment extension in future research.
Keywords/Search Tags:T-MMB, field programmable gate array design, COFDM, Demodulation, Synchronization
PDF Full Text Request
Related items