Design And Implement Of Scratchpad Memory Allocation Strategy For Multithread Processor

Communication with peripheral devices is the main burthen of embedded microprocessor. Multi-thread processor supports concurrent execution of multiple interrupts and tasks. At the same time, Scratchpad memory has high performance. Multi-thread processor and scratchpad memory are very suitable for establishing real-time systems. But most scratchpad memory allocation strategies are unfit for multi-thread processor.In this thesis, we design an instruction and data SPM allocation strategy for hardware multi-thread processor to reduce the worst case execution time of the program. In the hardware multi-thread processor, when multiple threads execute simultaneously, the threads will scramble for execution resources, the instruction pipeline of a single thread will be constantly interrupted. To solve this threads' interference problem, we propose a multi-thread instruction stream static analysis algorithm and iterative instruction node SPM allocation strategy. For the distribution of data nodes, we use integer linear programming algorithm to allocate private and shared data nodes. At the same time, we use the USB standard to design a peripheral management system. The system has an exclusive instruction SPM structure and virtual shared data SPM structure. According to the SPM allocation scheme, we optimize program and data structure for peripheral management system.In this thesis, we use two methods to verify the results, the software model and FPGA. Experimental results show that when the scratchpad memory resources grow proportionally, the worst case execution time of peripheral management will be reduced significantly. Specifically, when only 50% of scratchpad memory resources are available, the execution time whill decrease 20.3%. Compared to Kim algorithm, our algorithm improves 254% real-time performance.