The Design Of HCI Layer Of Bluetooth Low Energy

In recent years,the technology of Bluetooth Low Energy is very popular. It has many good features,very long connection distance,very low working power,making it a good choice for many devices. The low power Bluetooth HCI layer, as the interface of the low power Bluetooth host and the controller, plays an irreplaceable role in the low power Bluetooth,so it has significant importance to design BLE HCI layer circuit which meets the requirement.In this paper,the low power Bluetooth HCI layer is designed, including low power design and function design. From the aspect of Function design, this paper designs Bluetooth HCI layer according to the low power Bluetooth protocol using Verilog HDL,including the design and simulation of the command data processing module,the event data processing module, and the d asynchronous connection logic data processing module.From the aspect of low power design, Firstly, the hardware circuit is used to design the low power Bluetooth HCI layer on the system level. Generally, when working, the firmware occupies CPU for a long time with many I/O operations, which leads to high power consumption. The design of HCI layer with hardware circuit can avoid this shortcoming, thus reducing the power consumption. Secondly, on the system structure, it uses clock gating and power gating technique, under the precondition of satisfying the function and timing, it reduces the clock frequency of the system as far as possible, what's more, it uses pipeline technology to speed up the data transmission for the critical path. In this way, the main clock frequency is reduced, thus reducing the power consumption of the clock tree, and reducing the power consumption due to the reduction of the data processing time, the power consumption can also be reduced obviously due to the closing of non-working module. At last, the RTL level circuit is designed. A variety of low power optimization techniques are used, such as asynchronous design, memory gating, resource sharing and traveling wave counter to reduce power consumption.Finally, after the design and simulation of the overall circuit, the accuracy of the design is verified using FPGA and the optimization effect of the circuit is verified using DC. The result shows that the low power Bluetooth HCI layer designed in this thesis can transmit the Bluetooth data between the host machine and the controller at the operating frequency of the 8MHz system clock which meets the low power Bluetooth protocol and is compatible with a variety of Bluetooth chips on the market. The area is about 0.71mm2,the average power consumption is about 2.175mw.