Design Of Triple-redundant Communication And Control System Based On Embedded Technology

With the rapid development of information technology and electronic technology, it is more crucial to study the highly reliable system for aerospace, railway transportation, banking and other industries. Increasing the reliability of the system usually has two kinds of manner: one is to avoid faults; the other is to contain faults. However, the fault is actually random and uncertain. Therefore, it is essential to improve the system’s performance of fault tolerant.In this paper, the redundancy technology is used to improve the system’s performance of fault tolerant and then to raise the reliability of computer system. For airborne computer, with the analysis of the system’s demand and structure, the paper designs a triple-redundant communication and control system based on embedded technology, and proposes the overall design of the triple redundant system’s hardware composition and embedded software. The design researches the concrete realization of some key modules, including synchronous communication and fault detection. The paper accomplishes systemic software’s debugging, operation and testing, which suggests that the system can normally work according to the design scheme. The specific research contents are as follow:1. This paper summarizes the theoretical results and practical experience of the domestic and foreign fault tolerant technology. Then the reliability of four redundant systems are analyzed and compared by Markov chain, and it is obtained that triple-redundant system is more reasonable than others.2. The triple-redundant system exploits similar redundancy technology both in hardware and software. In the redundant system, each computer is also called a channel. Redundant channel run as hot backup. The CAN bus and the dual-port RAM complete communication between channels together, which is belong to cross communication data link.3. Clock synchronization is used in this paper, as system indemnity after system failure. A two-way handshake protocol is designed to achieve clock synchronization. The protocol is that each channel successfully sends its synchronization signal and successfully receives synchronization signals from the others simultaneously through dedicated synchronization signal line.4. Fault detection consists of self-test and checking each other, which is achieved by a voting algorithm based on residual. According to the principles of convenient and completeness, the vote needs to cover three parts: synchronous, CCDL and self-test.5. The module of channel fault logic elect the master channel through the information of self-test and checking each other, in accordance with the principle of majority consensus, with updating the fault record. In order to avoid blocking, the election of master channel also depends on the preset priority order of the three channels.