Dual System Redundancy And Arbitration Strategy Research

This paper studies the fault-tolerance technology in dual redundancy computer system, and introduces a design of bi-DSP system based on dual redundancy model. The thesis is mainly composed of three parts; select the solution of redundancy, hardware design and the software design of the bi-DSP system.Firstly, modern fault-tolerance technology is discussed and several typical fault-tolerance schemes have been compared and demonstrated. Then, the bi-DSP system based on dual redundancy model is proposed.Secondly, some modules of the system are designed in details, including the system controller, synchronization of bi-DSP, communication of dual controllers and switchover module. The dual-port RAM and McASP (integrated in DSP) are used in the system for the two controllers to communicate with each other. FPGA device and advanced VHDL language are used to implement the error detection and switchover. Moreover, simulations have been done for the logic design.Finally, the system software is designed with the method of modular and hierarchical design. The communication and synchronization between two DSP are reliable. An algorithm is proposed for the comparison and arbitration. At the same time, in order to strengthen the system's ability to detect fault, various methods are adopted for self-detection. In addition, fault-tolerant software is important to implement the high reliability of control system and then we can apply some methods to avoid disturbance, such as instruction redundancy, software trap, watch dog timer of software, etc, and then system can resume. In the end, the system' performance is verified by the simulations of various faults including hardware faults and software faults.