The Research And Implementation Of 2.5Gsps Arbitrary Waveform Generator

The Paper comes from the project on wideband signal analog generator. As an excitation signal source, Arbitrary Waveform Generator(AWG) can generate not only conventional waveforms, but also irregular arbitrary waveforms, which is of great importance in the test and measurement field. Therefore AWG has become widely used to generate complex waveform signals in the communications, radar, navigation and other areas.AWG is mainly composed of three parts, namely the waveform memory, the phase accumulator and Digital Analog Converter(DAC). The quantization error caused by waveform amplitude quantization, the nonlinear error introduced by the nonlinearity of digital to analog conversion module, and the phase truncation error produced by the limitation of the storage capacity of the waveform storage module are three main errors in the implementation of AWG based on Direct Digital Synthesizer(DDS) technology, which decrease the performance of AWG. The nonlinear characteristic of DAC is the most important factor that influences the waveform quality of broadband arbitrary waveform generator. In this paper, the fading caused by the Zero-Order Holding(ZOH) characteristic of DAC is explained in detail.Firstly, based on the analysis of the nonlinear characteristics of the DAC, we concentrate on the in-band Sinc function fading due to the Zero-Order Holding characteristic in DAC, and the fundamentals principle to compensate this characteristic by the FIR low-pass filter. The correction method using poly-phase FIR filter was deduced and demonstrated by MATLAB. Secondly, the principle and the distortion of internal interpolation, as well as the conventional FIR filters, are analyzed. An interpolation parallel poly-phase FIR filter algorithm to achieve interpolation simultaneously is implemented and simulated by MATLAB. The parallel interpolation FIR multi-phase filter makes the FPGA device to work at lower sampling frequency, so as to process the high speed task with the lower sampling frequency. Then, the broadband signal generator is implemented and verified on ML605 FPGA platform with AD9739 A, sampling at the rate of 2.5G samples per second. The coefficient simulated by MATLAB is used in the FPGA module to achieve parallel FIR poly-phase filter. The test results show that the filter with lower operating frequency can compensate the non-linear of DAC and the unevenness induced by interpolation, so that to improve the performance of the synthesized output.Finally, this paper summarizes the design and points out the areas that need to improve and optimize. Because the AD9739 A outputs two-channel data streams on the positive and negative edge of the clock, the clock distribution and timing restrains in FPGA should be improved to achieve better performance. Meanwhile we can continue to optimize the structure of the parallel interpolation polyphase FIR filters to reduce the comsumption of FPGA resources and power to get better performance of AWG.