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Design And Implementation Of Video Stabilization System Based On FPGA

Posted on:2016-11-23Degree:MasterType:Thesis
Country:ChinaCandidate:D D WangFull Text:PDF
GTID:2348330488957093Subject:Engineering
Abstract/Summary:PDF Full Text Request
The internal or external object motion in video may causes the jitter phenomenon, Image stabilization system can get the image offset value and compensate for the offset as far as possible. so that the image can be more clear. The traditional optical image stabilization and the mechanical image stabilization have the Characteristics of high cost, high power consumption, low accuracy, in contrast, the electronic image stabilization can overcome the above shortcomings and have better performance.This paper analyzes the general design framework and process of the electronic image stabilization system. Because the gray level projection algorithm can reflect the integrity of the image, the computation is small, and easy to transplant to the hardware platform, so this paper uses the the gray projection image stabilization algorithm and FPGA platform DEII115 to achieve the image stabilization system.The general design framework of the electronic image stabilization system needs to cache three frame images, the current frame, the frame of reference frame, and the frame to be displayed. In this paper, the system design scheme is improved by using the adjacent frame similarity principle and only needs to store a frame. The first frame, reference frame, is projected by row and column, and the result is cached forever. The subsequent images, current frames, are used to calculate the offset values, and the next current frame displayed in real time is compensated for the offset, so that number of frame needed to cache is from three to one, saving hardware resources and optimizing the real-time performance of the video stabilization system.In this paper, the Hardware Description Language Verilog is used to realize the gray projection algorithm, the difficulty lies in the data cache and complex computation. Some modules of the gray projection algorithm need to read the same image two times, necessary statistical information is collected in the first time, the frame is processed in the second time, so the frame must be cached, resulting in interrupt of the video stream and the delay of a frame at least. Some modules are involved in the calculation of floating point numbers or trigonometric functions, the hardware description language is difficult to achieve it, these modules are cut out. In addition, some parts of the gray projection algorithm, such as related calculation, need for multiple cycles, lead to the difficulties of the software In the synthesis and the implementation of the real-time video image stabilization. In this paper, the image reading and the cycle calculation of the grey level projection algorithm are put together, reading a pixel at the same time for a calculation, until the loop is distributed to the reading process of pixel. In this paper, the time of processing a frame image is divided into three parts, Column projection in the first, Cross correlation calculation in the second, and Image offset calculation in the third, in the same time, Variable initialization is done for the next frame image processing.In this paper, a video image stabilization system is composed of three parts, such as continuous image reading, image stabilization and image output, and the requirement of real-time, accuracy and stability is achieved.
Keywords/Search Tags:Video image stabilization, Gray level projection, FPGA, Verilog
PDF Full Text Request
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