Remote Update And Debugging Of FPGA For X-ray Detector Readout Electronics

X-ray two-dimensional silicon pixel detector is a new device designed for the major technical requirements for X-ray detection of Beijing synchrotron radiation light source. The detector system consists of five parts:silicon sensor array, front-end readout electronics, front-end system architecture and packaging, real-time data transmission and processing, back-end data acquisition system. Wherein the front-end readout electronics PCB board contains the Field-programmable Gate Array (FPGA) for data buffering and processing. The whole detector will work in a radiation environment, and the front-end electronics readout boards are placed in a sealed cooling container. This paper aims to design a remote updating program for front-end FPGA, so we can remotely upgrade and debug FPGA without opening the cooling container or using the dedicated Universal Serial Bus-Joint Test Action Group (USB-JTAG) download cable.Based on the traditional design ideas who used the ARM microprocessor as main controller, this paper using a new Xilinx Zynq-7000 scalable processing platform, based on the architecture of All Programmble System-on-Chip(AP SoC), as the main controller to design the remote update system for the JTAG interface configuration of FPGA.The Zynq-7000 chip combines the features and advantages of ARM and FPGA by intergrated both hardware resources of them. The overall design including two parts:hardware and software.The hardware platform design consists of the appropriate Flash and PHY chip selection, schematic and PCB design, modular design of Zynq processor system, analog JTAG driver IP core code design. The software design firstly transplant FreeRTOS real-time operating system and LwIP protocol stack into Zynq embedded systems, and then design the JTAG Server code using the C language based on the Xilinx Visual Cable (XVC) protocol. All of these ultimately implement the communication between the update system and upper computer software. At last, this paper completed the function and performance testing of the remote update system, the results show that the system can achieve flexible and reliable network-based remote updating and debugging of FPGA.Above all, the remote update system of FPGA in this paper have obvious advantages. Firstly, the Zynq chip integrated both the features and advantages of ARM and FPGA, which leads to the improvement of system performance and reduction of the hardware design complexity. Secondly, this paper based on XVC protocol, designed application code directly for TCP/IP networks and JTAG interface of FPGA. There is no need to develop extra TCP/IP-based application software on PC, thus greatly improved system flexibility and scalability. Thirdly, the TCP/IP network can guarantee high reliability of data communication, the JTAG configuration method also supports multi-FPGA serial configuration. Thus, the remote update system of FPGA showed in this paper has important practical significance for FPGA-based system design and maintenance, especially for the maintenance of networking equipment in harsh environment. This paper also provide a well reference for the application and promotion of AP SoC technology.