Design And Implementation Of IEEE 802.11b Baseband Physical Layer

IEEE 802.11 b system supports two communication modes: direct sequence spread spectrum and frequency hopping spread spectrum. Direct sequence spread spectrum has excellent anti-noise performance and the ability to prevent multipath fading, while frequency hopping spread spectrum has strong anti-interference performance and security. Therefore, the communication mode which combines both is widely applied in the field of military communication.The thesis designs a communication system which combines direct sequence spread spectrum and frequency hopping spread spectrum and is suitable for IEEE 802.11 b protocol. The digital baseband on the transmitting end encodes cyclically the frame header information it receives from its upper hierarchy first and then arrange framing based on the time determined by the time of frequency hopping and conducts scrambling to the result of framing in order to avoid the mutual interference with other narrow-band signals; then conduct DBPSK, DQPSK, 5.5M CCK and 11 M CCK modulations to scrambling data according to different data rate; the output result obtained via DBPSK and DQPSK modulations need direct sequence spread spectrum; at last conduct shaping filter to the output after spread spectrum and then send it out at the radio-frequency head. During the process radio frequency adopts the method of frequency hopping spread spectrum.The receiving end adopts RAKE receiver to conduct equal gain combination of the signals it receives; it acquires header information after vertical synchronization and conducts CRC verification to determine the data length and the modulation system, and decides to make frequency offset compensation or not based on the characteristics of the four modulation systems. Frequency offset compensation is needed only when CCK modulation is adopted. So the compensation method in this article is designed in accordance with the features of CCK codon. At last original input information can be gained by conducting corresponding modulation and descrambling to the data.On the basis of theoretical design, the dissertation conducts functional simulation and analysis of each module during the process of signal processing and does a veneer loop-back test on the Zedboard of Xilinx company; stimulative multipath channel is added during the test, which proves the feasibility of the design of the system.