Ultrashort Wave High-speed Frequency Hopping System Digital Phase Modulation And Demodulation Study

According with the development of communication technology, wireless communication in military requires higher performance, such as high data rate and integrated anti-jamming ability. Recently, frequency-hop communication has been widely used in many military wireless communication domains as a secure transmission mode. Meanwhile intercommunication and joint fighting among different military forces need an open, expandable, normalized software and hardware platform. Therefore the idea of software defined radio has been widely used in it.This thesis proposes an entire solution of modulation and demodulation, which is implemented on the physical layer of the VHF/UHF radio based on the software defined radio and frequency hopping technology. Two linear phase modulations-8PSK and π/4-DQPSK are given according the characteristics of frequency hopping. Three key technologies were further discussed which are detection of burst data, timing and carrier synchronization and channel equalizer. At last, the system was simulated by MATLAB and implemented on a Texas Instrument chip TMS320C6416.This paper is organized as follows:Chapter one first gives a brief introduction of military wireless communication. The development of software defined radio and anti-jamming technology are also introduced, especially the history and application of frequency hopping in military system.Chapter two introduces the frequency hopping system design of digital phase modulations-8PSK and π/4-DQPSK. The frequency-hop system is presented, and then the influence on the phase modulation system is emphasized, which is produced in frequency-hop transmission. At last, we scheme out the fundament and structure of phase modulation systems.Chapter three discusses the burst data detection technique. It gives the description and comparison between two different methods, the power detection and the correlation detection.Chapter four researches the realization of timing and carrier synchronization. This process includes three parts: initial parameter estimation, PLL(phase locked loop) error extraction and parameter correction.Chapter five focuses on channel equalizer. Based on the analysis of wireless channel, we point out the signals in this system come through the frequency-selective slow fading channel. A fast channel estimation Decision-Feedback Equalizer (DFE) algorithm is proposed, which is based on the training sequences. The algorithm is simulated and the performance is analyzed.Based on the experience of projects, chapter six presents the realization of hardware and software. We simulate the systems by MATLAB, and give the hardware platform and software architecture on DSP chip. The field-test results will be presented to demonstrate the system performance.