Design Of Variable Gain Amplifier For Wireless RF Chip

As a key component of the wireless Radio Frequency(RF) receiver, Variable Gain Amplifier(VGA) can adjust its gain according to the magnitude of the received signals. It is usually applied to the Auto Gain Control(AGC) system in order to improve the dynamic range of the whole receiver. Therefore, the performance of the VGA plays a crucial role in the wireless RF receiver. Based on the research of the wireless RF chip with reconfigurable frequency and bandwidth, this paper mainly carries out the design and implementation of the VGA of the analog baseband.In this paper, the operation principle and performance specification of the VGA are introduced firstly. Then, two different structures of VGA are designed and implemented. One is an open-loop VGA with continuous gain which is applied to the analog AGC system. Based on the exponential fitting function, an exponential gain generator is constructed to achieve the dB-linear gain characteristic. Moreover, the Gm-C feedback structure of DC Offset Cancellation(DCOC) circuit is also used to obtain a low output DC offset. The other is a closed-loop Programmable Gain Amplifier(PGA) with feedback resistors which is applied to the digital AGC system. The programmable resistor arrays are utilized to achieve the variable gain control. Furthermore, this paper proposes a digital assisted DC offset calibration method which can efficiently eliminate the DC offset with none near-DC rejection.The two VGAs are fabricated in GF 0.18 ?m 3.3V CMOS process. The measurement results of the VGA with continuous gain show that the dB-linear gain variation is-10~45 dB when the external control voltage changes from 2.3 V to 0.9 V, the-3 dB bandwidth at the maximum gain is 20 MHz and the low-cutoff frequency is less than 10 KHz. The chip area is 0.11 mm2 and the power consumption is 14.6 mW. The measurement results of the PGA show that the gain step is 3 dB, the gain variation is 0~40 dB and the-3 dB bandwidth is more than 5 MHz. The digital assisted DCOC circuit can achieve a short calibration time of 25 ?S with the offset residue voltage of less than 150 mV.