Research On Key Techniques Of Wideband Programmable Gain Amplifier And Automatic Gain Control Loop

With the rapid development of communication technology,as well as the arrival of large data age.The communication between people is getting closer and closer,followed by the requirement of the communication speed is also getting higher.The communication in the traditional bands has become more and more unable to meet people's needs,in the other hand,the advantage of millimeter-wave is obvious.Higher bandwidth means higher data rates.Using millimeter-wave in wireless communication has become a hot topic in academia and industry.This respect of the thesis is a wideband Programmable Gain Amplifier(PGA)which is based on TSMC 65nm CMOS process,used in the 60GHz millimeter-wave receiver for Millimeter-wave short-range wireless communication.As the receiver data rate of at least 5Gbps,so the bandwidth of the IF amplifier must be wide.After researching on the existing broadband PGA technology and making improve in Flipped Voltage Follower(FVF),a new amplifier is proposed by using the source capacitor negative feedback technique.The structure can extend the bandwidth without extra power consumption.In order to make the gain of the amplifier can be programmed to change,add the resistor array.Meanwhile,Introducing the capacitor array to prevent the peaking in the frequency response of the amplifier more than 1dB at all gain level.The post-simulation results show the gain range from 10dB to 30dB,a total dynamic of 20dB,the gain step is 5dB,the bandwidth is more than 5GHz.The capacitor can compensate for the changes in process and temperature,to ensure the bandwidth more than 5GHz at all corner to meet the design requirements.The design of Digitally Controlled Crystal Oscillator(DCXO)using Pierce oscillation structure with automatic amplitude control(AAC)circuit.The simulation results the oscillation frequency of 4 0M.tuning range is 100ppm.The phase noise at a deviation of 1kHz is 120dBc.The other respect of the thesis is the Automatic Gain control(AGC)loop implemented in TSMC 90nm CMOS process used in superheterodyne receiver.The whole circuit is composed of a three-stage Programmable Gain Amplifier(PGA)and Automatic Gain control(AGC)module.The PGA is designed with the resistance feedback in closed loop structure.Assign three levels of dynamic gain reasonably after comprehensive consideration of noise and linearity.Design the resistor array which can increase the PGA gain 1dB at a time.AGC loop consists of analog and digital module.The analog module catch and hold the maximum amplitude of the PGA output.Compared the held output voltage with two default _HV and _LV,thus a 2bit code is acquired.The digital logic units deal with the code and then control the gain of PGA until the amplitude of output is suitable.The post-simulation results the PGA achieve 8 to56 dB gains with 1 dB step.The whole gain dynamic is 48 dB.The output amplitude are limited to-5~-2dBm or-7~-3dBm.The chip is implemented in TSMC 90nm CMOS process and has been completed testing.The test results show that the dynamic gain of PGA is 44 dB and the dynamic of output amplitude can be controlled by AGC loop is 20dBm.The analog baseband exhibits 2dBm output 1-dB compression point and 36dB noise figure at 70MHz.