The Design And Realization Of Fast Hopping Frequency Synthesizer

In the communication system,we always use the frequency hopping communication technology to increase system's capability of jamming and anti-interception.Frequency hopping communication system has been widely used in the military,medical,electronic warfare,instrumentation and other fields.The frequency synthesizer as the core part of the frequency hopping communication system determines the speed and stability of the frequency hopping system.Therefore,the design of frequency synthesizer is very worthy of further study,particularly against the key indicator for the hopping speed's upgrade of the system will capture a significant impact on performance.Based on the development of the ****** system,a new L band frequency synthesizer is designed.It has the advantages of fast frequency switching speed,low phase noise,spurious output,and smaller.Combined with the frequency range(1125 ~ 1230MHz),hopping rate(> 77 KHop / s),the frequency switching speed(< 200ns),spurious suppression than 60 dBc,local oscillator phase noise(<-90 dBc / Hz@10KHz)and other requirements,this paper compares several frequency synthetic schemes,including dual phase-locked loop Ping pong,PLL voltage preseted,direct digital frequency synthesis multiplier,DDS + PLL mixer,etc.,Combination of there advantages and disadvantages,this thesis uses a direct DDS multiplier to design the frequency synthesizer.For the selected DDS multiplier scheme,here gives a detailed analysis of the phase noise and spurious suppression performance.Contrast to the common DDS chip such as AD9910,AD9912,AD9915,analyzes the Spurious Free Dynamic Range,and planning the frequency combined with target band frequency range.The program selectes the AD9912 DDS chip,it can reach the target frequency after 2 times doubler.Against to characteristics of serial configuration of AD9912,here gives a detailed analysis of the system frequency hopping time,using pre-configured register to achieve the purpose of the Czech Republic by the switching frequency of the signal given by IO_UPDATE.And the simulation results proved the design can better meet the requirements of system metrics.Uses two 2 multiplier(AMK-2-13 +,KC2-11)produced by Mini-Circuits Company to design the two stage doubler link.Low spurious suppression is the shortcomings of DDS system,so it is necessary to introduce a filter to overcome this shortcoming,and the design of the filter is not an easy task.The paper simulates the three key band-pass filters through the ADS RF simulation software,and add Murata performed model for the system in the actual design.Select AD9516-3 as the system clock divider;uses FPGA to control the entire system.Designed the hopping pattern based on the RS sequence.Finally,the system is designed as a four mixed-signal hardware platform through Cadence Allegro,make the appropriate layout and wiring design,grounding design,decoupling design and power integrity simulation analysis for the consider of electromagnetic compatibility,power integrity and physical test other factors,and completes the hardware implementation of the fast frequency hopping circuit synthesis system.This paper realizes a fast frequency hopping synthesizer scheme completely which can better meet the requirements of the frequency synthesizer on principle demonstration and hardware implementation,and has high value in the actual project.