A Design For Sub-nyquist Sampling Analog-to-information Convertor Based On Compressive Sensing

In recent years, Candès et. al proposed Compressive Sensing(CS), which proves that it is possible to reconstruct the original sparsity signal with less sampling points than Nyquist sampling. The CS theory breaks the limitations of Nyquist sampling theory, and it is of great significance to signal sampling and processing. At present, Analog to information converter(AIC) based on CS generally exist some problems, such as high complexity and instantaneous sampling frequency.This paper presents a new AIC structure based on two-stages sampling holder(SH). Firstly, we design mixed timing pattern to control two-stages SH circuit to sample the analog signal. Through holding the random sampling signal for the same time, the system can not only reduce the average ADC sampling frequency, but also the instantaneous frequency. Then, to make this AIC more easy to use, the two-stages SH AIC is designed as a sampling front-end, and it can be directly applied to the traditional Nyquist sampling system, and make it very easy to be extended to compressed sampling system.In addition, we test the AIC performance based on EP2C5T144C8 N FPGA. Firstly, to evaluate the reconstruction accuracy, the data compression factor(CF) increases from 1 to 15. The results show that, the percent root-mean-square difference(PRD) increase with CF, but the mean of PRDs are lower than 1.5%, and the maximum values are less than 2%. Then, we also evaluated reconstruction stability for different sample matrices and different signal frequency, we use 10 different random binary matrices sampling 1K sin signal, and the results show that the PRDs are distributed from 0.6% to 1.3%. And with the CF increases from 1 to 15, PRD increase from 3% to 5.3% for 10 Hz sin signal, and 3.8% to 5.7% for 1kHz sine signal, and 4% to 7.3% for 1MHz sin signal.