Adesign Of External Capacitor-less LDO And Study Of Typical Operational Amplifier

With the development of mobile intelligent devices,larger number and higher performance of power management chips is needed.As a number of power management chips,LDO takes less chip area and lower power consumption with good power supply suppression and simple circuit structure.Operational amplifier is the most basic analog circuit unit with a complete function and it is an indispensable part of the signal processing circuit.Therefore,the design of high-performance LDO and the study of typical operational amplifier has great theoretical and engineering significance.In this paper,a capacitor-free LDO is designed based on TSMC 65nm LP CMOS process.This LDO includes basic modules such as bandgap voltage reference circuit,error amplifier,power devices and feedback network.Since the LDO has no external bulk capacitor,a compensation capacitor is inserted between the gate and the drain of the power transistor to ensure the stability of the system.In order to reduce the output noise of the LDO,a low-pass filter consisting of capacitor and active resistor is added after voltage reference circuit and feedback network,which can suppress the noise of them to the output.In order to improve the power supply ripple rejection(PSR)of LDO,a common source stage with diode-transistor load is added to amplifier in the bandgap voltage circuit to improve the PSR of the bandgap reference circuit.Besides,this paper studies the typical model of two-stage operational amplifiers and gives the design program.Afterwards,three kinds of two-stage operational amplifiers are designed to verify the program.The area of the LDO chip is 0.344mm×0.347mm.According to the simulation results,the input voltage is 1.4?1.8V and the output voltage has two options of 1.0V and 1.2V.The maximum output current is 200mA and the minimum output current is 10mA.In the TT process angle,the dropout voltage is 182mV and the quiescent current is 0.6mA when the LDO has heavy load.The PSR of LDO is-51dB@1kHz and/or-47dB@100kHz and the output noise is 33nV/?Hz.This design meets the requirements of the specifications.