Hardware Design Of Ultra Short Base Line Positioning System Suitable For AUV

Autonomous Underwater Vehicle (AUV) has a large range of motion and is suitable for deepwater operation. So it becomes more and more popular for people to use it in the field of mineral exploration. Limited by complex underwater environment, AUV have to return the supporting planform regularly,in order to charge and update task. AUV docking system relies on inertial navigation system, in cooperation with acoustic positioning system and Doppler Velocity Log, to lead it back.In order to be suitable for AUV docking system, USBL use an intergrated structure to package the transducer and hardware platform in a same shell. The intergrated structure design brings not only compact structure,but also more difficulty of hardware circuit design,which may limit the design of hardware. This paper has to take a full consideration of size and power consumption in order to meet the requirement of AUV docking system. It is special for hardware platform to design a Data Storage Unit in order to collect information for further research. The entire hardware platform is divided into four parts: Receiving Unit,Transmitting Unit, Digital Signal Processing Unit and Data Storage Unit, according to different function.The Receiving Unit is responsible for the weak electrical signal receiving via the hydrophone and the signal amplification and filtration. In this paper, the overall program, the gain controllable amplifier circuit design, the active filter circuit and optocoupler isolation circuit are analyzed and discussed, and designs the circuit to meet the technical requirements of this article. The main role of transmission unit is to transmit high-power transmission unit pulse signal to the beacon, in order to meet the small size and high power requirements, the transmission unit of the power amplifier circuit design approach adopts a Class D amplifier circuit. Meanwhile, the paper also analyzes the principles of MOS transistors selection,characteristics of MOS transistors drive circuit, the parameters design of the transformer,impedance matching and other issues, and designs the circuit to meet the technical requirements of this article. Data storage unit is mainly responsible for the completion of the storage of the original data during system operation.Digital signal processing system is the core unit of the whole system, which contains a piece of Cyclone II series FPGA (EP2C8Q208I8) and two pieces of fixed-point C64x series DSP (TMS320C6416). These two pieces of DSP is divided into main chip and slave chip,according to the different function. FPGA has the functions of AD signal acquisition, FIR filtering, data transfer, synchronization signal generation, working mode configuration. Slave DSP is mainly responsible for realizing timing delay estimation via the data received from the FPGA, and transfers the result to master DSP. Master chip work out the positioning result in geodetic coordinate system with GPS data, compass data and timing delay estimation. Finally,the positioning result is transferred to the host through serial port.The platform works stable throughout the test in laboratory.