The Implementation And Application Of FSK Signal Receiver Based On FPGA

Balise is the essential safe equipment in communication between the train and ground. It transmits moving slope, speeding limit and other information by FSK in the driving process. Balise Transmission Module is a main part of train control system. The core function of BTM is receiving and demodulating the FSK signal. The information is directly related to the safety of train traffic. So balise signal correctly demodulated has very important significance.This paper first introduces FSK demodulation algorithm, CORDIC algorithm, highly effective digital filter and other important theories of FSK signal receiver. Then, it compares and analyzes the analog signal receiver and digital signal receiver. According to the technology of software defined radio, this paper puts forward a kind of FSK signal receiver scheme in digital. In this project, it uses MATLAB software to stimulate the continuous phase frequency shift of the FSK signal, which has a center frequency of 4.234 MHz and a 282 kHz offset frequency. Then, it uses the high-speed ADC for signal acquisition. It completes FSK signal sampling, mixing, slowing down sampling, low-pass filtering on FPGA device by digital quadrature demodulation.The development of FPGA is based on the idea of module by using Verilog hardware description language and IP core to design digital receiver circuits, focusing on designing and analyzing NCO, CIC filter, FIR filter and other key modules. At last, this paper make a systematic analysis and summarization about the digital receiver, including the simulation of the whole system, the system interface design, the system resource consumptions and the resistor transistor logic schemes.The project stimulates the FSK signal receiver in Modelsim environment. When the signal center frequency fluctuation is 50 kHz or less, and the offset frequency is 10 kHz or less,the receive data is consistent with the original data. It shows that the FSK signal receiver scheme based on FPGA is feasible and suitable for balise signal demodulation.