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Design Of Demodulation Module For SSR Receiver Based On AD9361

Posted on:2022-03-02Degree:MasterType:Thesis
Country:ChinaCandidate:J W WeiFull Text:PDF
GTID:2492306524988439Subject:Master of Engineering
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In order to meet the increasingly busy needs of air traffic,transportation,agriculture,forestry,national defense and other undertakings,and to ensure the safety of the aircraft,relevant personnel need to rely on the SSR to complete the communication requirements and master the real-time information of the aircraft.The application of communication equipment based on the principle of secondary radar is very important.This article is based on the radio frequency transceiver device,coupled with hardware control logic,upper computer and other modules to realize the overall construction theory and functional test of the demodulation function of the secondary radar receiver.The function of this device mainly includes the demodulation and decoding function for the A/C and S mode signals transmitted by the interrogation signal transmission device.This text has realized the function of the demodulation module of the secondary radar receiver from the technical principle to the circuit and logic design.This article has three main research contents:1.Start with the indicators and functions of the demodulation module of the secondary radar receiver constructed in this subject,and analyze the transponder with S mode communication function and its communication data link(A/C,S mode).The technical route of the zero-IF architecture for down-conversion of radio frequency signals is proposed,and the orthogonal demodulation algorithm involved in the zero-IF architecture is studied.The idea of zero-IF architecture is based on software radio technology.The practice of this idea in this topic will enable the equipment to have the inherent characteristics of software radio technology such as low cost,easy upgrade,small size and high performance.2.The design part of this subsection is divided into overall circuit design and hardware logic design.In the circuit design,the AD9361 chip is used as the radio frequency transceiver device,and the FPGA is used as the baseband processor.The two constitute the main unit of the radio frequency transceiver of this equipment.Circuit units such as internal registers and digital interfaces of the radio frequency transceiver can be flexibly configured,thereby making the down-conversion of radio frequency signals and subsequent baseband signal processing units more convenient and more functional.This part completes the down-conversion function of the radio frequency signal and provides the basis for the subsequent hardware logic design.3.In the hardware logic design.A working module that can correctly demodulate and decode only A/C mode interrogation signal,A/C/S full call interrogation signal and S mode interrogation signal is designed.Among them,the demodulation module measures the pulse interval and pulse width to identify whether the response signal is an A/C response signal or an S mode response signal.The decoding module uses the state machine to complete the decoding of the A/C mode query data link and the S mode query signal address check.The S mode address check uses CRC check.Finally,a test platform was built with the host computer,oscilloscope,radio frequency signal transmitter and other equipment to verify the function of the subject research module and related technical indicators.The demodulation module of the receiver has normal and stable working characteristics,can correctly demodulate and decode the A/C,S mode interrogation signal,and its function can reach the relevant index required by the project.It can be applied to airborne SSR for signal processing.
Keywords/Search Tags:SSR, decoding, A/C/S mode, quadrature demodulation, digital signal processing
PDF Full Text Request
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