Research Of Non Punch Through Insulated Gate Bipolar Transistor In Indunction Cooker

Insulated gate bipolar transistor (IGBT) is widely used in the field of power electronics, because of its high breakdown voltage, low power consumption, small on-resistance, large current and easy to drive. It is also one of the most important new power semiconductor devices at present. As an outstanding representative of the IGBT device, NPT-IGBT has many advantages such as high reliability and positive temperature coefficient. As a result, it is becoming the development focus of IGBT. Besides, compared with domestic immature fabrication technology of FS-IGBT, the technology of NPT device is relatively easy. Consequently, it has great realistic meaning of research and optimization of NPT-IGBT.The basic operation principle of NPT-IGBT is analyzed in this paper. The analytical expressions of the device are described as well, including threshold voltage, conduction current, on-resistance, forward voltage drop in on-state and breakdown voltage in off-state. The relationship between the electrical properties and cellular size and doping concentration are revealed in these equations. Meanwhile, the purpose of this article is to design a type of NPT-IGBT device with smaller parasitic gate capacitance, which can replace the similar products abroad. Therefore, based on traditional planar gate devices, a scheme of split gate is adopted to design NPT-IGBT in the paper. According to the theoretical analysis, the manufacture process and electrical properties are simulated by using the software TSUPREM4, MEDICI. The simulation included gate length, distance of split gate, backside ion implantation, JFET implantation and how to restrain the parasitic thyristor effect. The range of optimum parameters are obtained, which can provide reference for the design of specific devices.Finally, based on the mentioned theoretical analysis, simulation results and design requirements, a device of 25A/1200V NPT-IGBT with split gate is accomplished in the paper, including design of N-base’s thickness and concentration, parameters of P-well, gate length, distance of split gate, the concentration of N+ emitter and lateral length, backside ion implantation dose, terminal structure and design of manufacture process. Moreover, the scheme of layout is also presented by software CADENCE. The final simulation results showed that the breakdown voltage is higher than 1200V, the threshold voltage is 3.1V. Equivalent input capacitance Cies, equivalent output capacitance Coes and trans capacitance Cres are 1222pF,132pF and 22pF respectively. Compared with the Fairchild Corp’s products FGA25N120AND, parasitic capacitance of the device decrease significantly.