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Design And Implementation Of Programmable Gain Amplifier And Current-Mode Complex Bandpass Filter

Posted on:2016-10-02Degree:MasterType:Thesis
Country:ChinaCandidate:Z YeFull Text:PDF
GTID:2308330503476369Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
DRM (Digital Radio Mondiale) and DAB (Digital Audio Broadcasting) are the two most widely used digital broadcasting standards in the world. The research of receiver ICs based on these two standards is of great significance for the development of wireless communication ICs in our country.The DRM reciever proposes a dual-conversion low-IF (DLF) system architecture with the second intermediate frequency of 2.048 MHz. The resreach objects of this paper are the circuits of programable gain amplifier (PGA) and current-mode complex band-pass filte for the second IF.The PGA is an important module in a wireless receiver, which ensures a large input dynamic range. The PGA proposed in this paper adopts the structure of resistor feedback loop based on an operational amplifier (OPA). The two-stage OPA takes the Miller capacitance to compensate for the phase margin, and a class AB output stage is used to expand the output dynamic range and reduce the static power consumption simultaneously. In addition, a low-gain DCOC feedback loop is to eliminate the DC offset. The bandwidth of the PGA is over 10 MHz; the voltage gain varies from 10 dB to 50 dB by 1 dB step; and the input 1 dB compression point is larger than 5 dBm when the gain is 10 dB.Then, the design of current-mode filter with image frequency rejection is proposed. Both the input and output of the filter are current signals. The filter in this paper is a complex 3rd order Chebyshev-I active RC filter. The center frequency is 2 MHz with a passband of 1.6 MHz. The Gain fluctuation of passband is within 3 dB, while both of the IRR (image reject ratio) and the ACS (adjacent channel selectivity) exceed 35 dB. A fully differential current amplifier (FDCA) based on second-generation current conveyor (CCII) is introduced. Furthermore, programmable capacitor array is used to help tuning the filter.The designs are both fabricated in full custom design flow with standard SMIC 0.18μm CMOS technology. Most of the test results meet the requirments. After analyzing the test results, some suggestions for future work are given.
Keywords/Search Tags:Programable Gain Amplifier, Common-Mode Feedback, DC Offset Cancellation, Current-Mode Filter, Current Conveyor
PDF Full Text Request
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