Based On SOC Three-mode Satellite Navigation Receiver Information Processing Technology Research

Science and technology changes with each passing day, the study of the satellite navigation system is not only from the optimization direction of progress, a system of multiple systems in the field of military and civilian integration navigation and positioning way more and more important. The SOC chip because of its characteristics such as high integration, high flexibility, sure to its outstanding advantages in various fields.This topic research is a kind of three mode navigation receiver based on SOC architecture design and implementation method, and the main part of architecture building and information processing. The GPS satellite signal are respectively the receiver choose/Ll frequency point, GLONASS/L1 frequency points and BDS/B1 frequency signal, and connecting with the theory and algorithm of satellite navigation and related information processing and fusion of three kinds of system design and realization of navigation receiver.This topic design three functions modules of the receiver requires chip support. The three major functional modules according to the processing sequence RF front-end processing module is respectively, baseband signal processing module and orientation calculating module. MAXIM company MAX2769 chip used in rf front-end processing, after a SOC chip implementation of two modules. The chip select Zynq-7000 series chips xc7z020 Xilinx company, its encapsulation is clg484, rate of-1.The function of RF front-end processing module is the realization of the satellite signal under the high frequency of frequency conversion to the intermediate frequency and digital to analog conversion and sampling, because using the three frequency points, so the three MAX2769 to implementation. Baseband signal processing module is mainly completed in xc7z020 chip digital logic of FPGA, including signal capturing and tracking. Navigation calculating process is implemented by the ARM architecture in the xc7z020 A9, including the extraction and smoothing of the observed quantity, calculation of navigation data, as well as to capture the control process of tracking module. Used in the control process and data interaction of AXI (Advanced eXtensible Interface) bus, improve the transmission speed. Xc7z020 digital logic in the process of this topic in the design of FPGA implementation of the baseband processing module and in software ARM CortexA9 data interaction between the positioning of the decoding module is the design of this topic. With antenna test result shows that this topic design of receiver positioning, and to achieve the convergence speed, timing function.