Design And Implementation Of The Optimal Projection Plane Based Radar Target Recognition Technology Based On FPGA

With the appearance of high-range resolution radar, radar target recognition technology has been developed rapidly. The radar target recognition can be roughly divided into two kinds, range profile recognition and two-dimensional image recognition. The realization of range profile recognition is relatively simple, and less data is needed. More importantly, it is more convenient for real time processing.Among lot of methods of range profile recognition, with the number of targets increasing, optimal projection plane method can maintain a high recognition rate. Thus, realization of optimal projection plane method based on the hardware has a highly military and civilian value.This dissertation focuses on studying the range profile target recognition methods based on optimal projection plane algorithms, which is designed and implemented in FPGA device. The main contents are as follows:1. The author of the thesis makes a brief introduction of the characteristics of range profile and the pretreatment of the data, and analyzes the optimal projection plane method, and also completes the simulation in MATLAB.2. The FPGA design of the basic floating point operation modules is completed and introduced, including plus and minus operations module adopted two-path design method, multiplication operation module, the division module adopted Goldschmid algorithm, and the root operation module adopted the Taylor approximation algorithm All modules have great design precision and pipeline structure.3. According to the requirements of the realization of optimal projection plane method, the design of floating point matrix multiplier is also studied. The FPGA design of floating point accumulation module and vector dot product module is introduced. On this basis, the design of floating point matrix multiplier adopted parallel structure is presented. The design method of high level matrix multiplier is discussed as well. And according to the requirements the design method of the inversion of the floating point matrix module is studied. The author completes and introduces the FPGA design of the inversion of the floating point matrix module adopted block matrix algorithm, the inversion module adopted LU decomposition algorithm and the inversion module adopted block LU factorization algorithm. The design method of matrix LU decomposition module as well as the inversion of triangular matrix module is also presented. And the design method of inversion module for high level matrix is discussed. The order of matrix multiplication is improved to 16 and matrix inversion order is improved to 8, on the basis of the previous work Simulation experiment of all the above modules is carried out.Design and implementation of real time identification system based on optimal projection plane method is completed. The projection circuit as well as classification circuit is designed and implemented. The function simulation of the system design is carried out and the simulation results are compared with the Matlab simulation results. The system has a high precision and a low system delay.