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Research On Internal Matching Technology Of Radio Frequency LDMOS

Posted on:2017-03-15Degree:MasterType:Thesis
Country:ChinaCandidate:C H LiuFull Text:PDF
GTID:2308330485487925Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the development of modern communication technology, more and more requirements for microwave power devices are required. RF-LDMOS is a microwave power device developed in recent years, but due to its unique structure and performance advantages, RF-LDMOS stands out from many microwave power devices. In order to meet the needs of mobile communication base station and military radar, RF-LDMOS toward a higher operating frequency, greater power output direction. However, with the increase of working frequency, the influence of various parasitic parameters can not be ignored. RF-LDMOS uses multi grid finger or multi cell parallel technology to increase output power, This is possible because of the processing process caused by the grid finger or between cells and cell signal transmission is not consistent, resulting in increased energy loss, and even burning device. With the increase of gate width, the input and output impedance will be gradually reduced, and the input and output impedance will be too low to increase the difficulty of the matching circuit design. These problems can be solved effectively by using the internal matching technique. Under this background, the research on the matching technology of RF-LDMOS is put forward.This paper mainly focuses on the research of the matching technology of the working frequency for RF-LDMOS 1.2GHz-1.4GHz.Through literature, we learned in the match technological developments at home and abroad and its specific design methods. Before the network design is carried out, the input and output impedance of the tube core must be determined. Although the RF large signal model is relatively accurate, it is difficult to realize the modeling in a short time. Load pull technique is more to test the RF-LDMOS device that has been matched with the package. On Wafer testing is mainly used in small gate width device. In all aspects, the final selection is based on the small signal S parameter theory, and the RF-LDMOS pipe core S parameters are obtained by extracting the parameters,and then in the design of the matching network. In order to achieve better embedded, Using HFSS software to modeling and simulation package shell, bonding wire, MOS capacitorFinally, according to the matching circuit design theory, combined with the RF-LDMOS work environment, select the appropriate internal matching network, optimize the simulation by using ADS software, calculate the matching element values. Then using HFSS software for matching element values of 3D modeling and simulation, and the models of each component transferred to the packaging shell model(i.e. a matching network model).Then matching network within the HFSS model into Ansoft Designer, create a dynamic link to achieve co-simulation to simulate the actual situation. Based on the above method designed single-cell RF-LDMOS RF-LDMOS amplifier and twin amplifiers, and basically meet the design requirements...
Keywords/Search Tags:RF-LDMOS, Internal matching technology, S parameter, input and output impedance, matching network
PDF Full Text Request
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