FPGA Implementation Of Compressed Sensing Signal Reconstruction

The traditional signal processing method is the first sampling, after compression, and finally transmitted to the terminal processor. The sampling frequency must satisfy the Nyquist Shannon sampling theorem, otherwise the reconstructed signal will be distorted. As a new signal acquisition and processing method, compressed sensing was first proposed in 2006, it allows people to lower the frequency of the signal sampling, obtain higher resolution at the same level of hardware. At present, the signal reconstruction of compressed sensing is mainly completed by computer software, and the speed is slow, so it is difficult to meet the demand of real-time application. FPGA has the advantages of high parallelism, easy to cut, ect., and is used in the hardware implementation of complex algorithms.In this paper, we mainly study the signal reconstruction of compressed sensing, and design the hardware implementation of the algorithm.Firstly,we analyze the performance of different reconstruction algorithms, and determine the orthogonal matching pursuit algorithm as the target algorithm. The process of orthogonal matching pursuit algorithm is studied and the hardware implementation based on FPGA is designed according to the characteristics of the algorithm.Secondly, we use the standard equation method to solve the least square problem,and use Schimidt orthogonalization to achieve the matrix inversion. Since matrix multiplication and matrix inversion is computation intensive operation process, we use float point number to ensure the accuracy.Thirdly, the standard equation method is improved, we put forward the direct solving method to solve the least square problem which is based on givens rotation, avoid the matrix multiplication and matrix inversion. The hardware implementation of two methods is simulated and synthesized. Experimental results show that two methods both obtain well reconstruction results. The direct solution is faster than the standard equation solution and the logic resource is lower.