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The Design On Three-Dimensional Laminated Packaging Technology Simulation System For Microelectronic Device

Posted on:2017-03-20Degree:MasterType:Thesis
Country:ChinaCandidate:H Y CaoFull Text:PDF
GTID:2308330485483323Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
In the electronic information industry, the application of integrated circuit packaging technology is closely related to the development of electric information industry. Electric information industry is also the main industry supported by the national. In the same time, it is also part of national economy which can’t be cut. Microelectronic packaging technology is a comprehensive technology which developed from the basis of integrated circuit packaging technology. So it is more adapt to the trend of miniaturization of electronic devices, portable, high performance, high density, intelligent and so on. College as the main talent training bases for microelectronic packaging technology, the traditional teaching mode is the teaching of theoretical knowledge, lacking of practical teaching, especially lacking of the teaching for packaging process and package manufacturing equipment. This kind of teaching method leads to the difficulty of entering the work role when the students just take part in the work. The software system developed in this paper is also mainly to solve this problem.This subject’s research device of three-dimensional laminated packaging technology simulation system is a teaching and training software which based on virtual manufacturing technology and developed with VC6.0 programming technology, SQL Server 2000 database technology,3Dmax modeling technology. Users can train and learn the three-dimensional laminated packaging, virtual manufacturing, test evaluation in the developed software platform. And the developed software system has huge potential market in the teaching of microelectronic packaging for college.The device three-dimensional laminated packaging technology system has five modules, which are lead bonding chip laminated module, silicon via laminated technology module, wafer level laminated module, vector laminated module, theoretical knowledge teaching module. and with the design of examination system for users to teach and train the three-dimensional laminated packaging technology.Software system from five aspects to design the teaching, which are device parameters evaluation design, equipment operation evaluation design, process evaluation design, theoretical knowledge teaching design, examination system design. Users can know the packaging device parameter’s significance and effect through device parameters evaluation, familiar with the operation by the device operation evaluation, master packaging process by the process evaluation, learning microelectronic packaging technology knowledge by theoretical knowledge teaching, evaluation the learning results by the examination system. And design corresponding database towards individual information which software need to access, the data which users need to operate, the questions of examination and so on.
Keywords/Search Tags:microelectronic packaging, device three-dimensional laminated packaging, virtual manufacturing, VC6.0, SQL Server 2000, 3Dmax
PDF Full Text Request
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