VLSI Structure Design Of HMAC-SHA256

With the rapid development of Internet technology and network communication technology, contemporary society has entered the information age. The style of people exchange information and sharing information has gradually diversified, but the information transmition common channel and computer storage systems are often fragile. It is vulnerable to unlawful attacks. Loss of information often cause very serious economic losses. So the issue of information security in the transmission process has increasingly become the focus of people’s attention.Encryption and authentication is an effective means of preventing illegal attacks. On the basis of introduction of SHA256 and HMAC algorithm structure, this paper has done a detailed analysis for both. By Comparing the performance of SHA256, SHA1 and MD5 in the fight against the birthday attack and differential attack and the achievement efficiency of several algorithms, we ultimately choose the SHA256 algorithm as the core algorithm of HMAC. This paper analyzes the impact of key lengths on HMAC security. Finnally, by weighing the factors of the algorithm security and speed we determine the length of the key.With the analysis of the SHA256 algorithm structure, we design Wt pre-calculation module for SHA256. At the same time we find the critical path of the SHA256 arithmetic unit.And then by using the insert intermediate variables, we make the adder in critical path ahead of a calculation cycle, which can greatly reduce the critical path and improve operational efficiency. According to the characteristics of HMAC algorithms, the circuit structure is divided into SHA256 computing module and a HMAC control module on two levels. It can not only achieve alone operation of SHA256 but also have function of HMAC-SHA256. The application will be more flexible.After HMAC-SHA256 hardware design work has completed, we use the NCVerilog emulator to build a simulation platform and generate test vectors from the gold model for a comprehensive verification of HMAC-SHA256. Simulation results show that HMAC-SHA256 features standard agreements. Then a So C platform has been built. HMAC-SHA256 is encapsulated into an IP core mount to the system. So C on an FPGA running results indicate that HMAC-SHA256 algorithm in the 100 MHz clock can generate the correct message digest. Finally, we synthesize the HMAC-SHA256 module and share the synthesize results.