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Design And Implementation Of Evolvablesecure SoC Prototype Based On AES Algorithm

Posted on:2015-05-27Degree:MasterType:Thesis
Country:ChinaCandidate:K SunFull Text:PDF
GTID:2308330479476184Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
AES cryptographic chip as the carrier of AES cryptographic algorithm is widely used in electronic commerce, taxation, communications and other fields. Nowadays the progress of computer technology and the emergence of quantum computer is a threat to the cryptographic systems. Bypass attack technology development on the other hand, makes the security of the AES cryptographic chip down further. Research on the security of the AES cryptographic chip and improve the security of AES cryptographic chip becomes very important.This paper studied the key technology of evolvable crypto chip for the purpose of build evolvable security SoC prototype based on AES algorithm. A evolutionary algorithm that generate S box which have better nolinear, differential and avalanche characteristics was designed to enhance the security of AES algorithm. To improve the computing speed, encryption and decryption method based on T box was designed by merging operation steps in the AES algorithm. A kind of encryption and decryption multiplexing circuit structure was put forward to saving circuit resources by extracting the similar items in the process of encryption and decryption. A reconfigurable AES coprocessor that can dynamic loading S box was realized by the design of interface circuit based on AXI-Lite bus and the encryption and decryption multiplexing circuit. In the process of AES coprocessor implementation, defense of side-channel attack was considered. A power attack resistance circuit based on mask structure was designed. Also a fault tolerant circuit structure based on data redundancy was put forward to defense error injection attacks. The paper then verified the RTL level circuit of AES coprocessor on the Modelsim simulation platform. Using Xilinx FPGA, Microblaze was chosen as the controller and S box evolutionary generation algorithm was transplanted on it. The evolvable security SoC prototype was achieved with the Microblaze and AES coprocessor. To verify the correctness of the evolvable security SoC, PC program that can display SoC’s evolution, encryption and decryption process was achieved by design the interface and communication protocol between the Microblaze and PC.The evolvable security SoC prototype based on AES algorithm designed in this paper has the advantage of algorithm security gradually strengthen in work and the structure of the circuit can effectively resisit the bypass attack. It lays the foundation of evolvable AES cryptographic chip.
Keywords/Search Tags:cryptographic chip, AES, evolvable cryptosystems, side channel attack
PDF Full Text Request
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