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Effect Of Pattern-dependence On 12 Inch Wafer Cu ECP Process Topography

Posted on:2015-09-14Degree:MasterType:Thesis
Country:ChinaCandidate:Y Y BaiFull Text:PDF
GTID:2308330476953809Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
Electronic Copper Plating(ECP) topography is known affected by layout design and dummy inserting. As consequences of balance among mechanisms associated with different functional ingredients in electroplate liquid, copper can be filled in the trench by the forms of “conformal-fill”, “bottom-up” or “supper-fill”. During different products of ECP processing, we can find that such post ECP topography is not only depends on process conditions, but also exhibits strong pattern-related dependency.In this paper, pattern-related effects of ECP topography were characterized with a pre-designed test chip that contains test-keys of line/space arrays of varying line and space widths, and thus also including varying pattern-density(PD). Here, the sizes of line/space width are from ~80nm to 3um, and PD distribution range also from 10% to 90%. It almost includes all of metal pitch size and PD in the semiconductor manufacturing industry. Base on post Cu ECP XSEM and AFM data, It can be concluded as follows:1) With line-width(LW) fixed at different size, different trends were observed for narrow lines and wide lines, in both array height(AH) and step height(SH) vs. varying PD. For narrow lines(LW<0.3um), AH increase with increasing of PD; while for wide lines(LW>1.0um), AH decrease with increasing in PD. But SH showed the opposite trend with AH.2) With PD fixed at different site, similar trend was observed in three groups of test key. Especially when PD fixed at 50%, the AH of the pre-designed test features first decreases with increasing of LW when the test key LW is less than 1.0um, and then AH has little increases with the LW increasing and saturates at LW tends to 3.0um; the SH of the pre-designed test features increases with LW, and approaches to 25% trench step height when LW is greater than 3um.Based on the testing data and the analysis of the result, a empirical model was built to simulate post-ECP topography partial characters. It captured pattern-dependency in post-ECP AH and SH with acceptable fitting GOF(R2>90%).
Keywords/Search Tags:Integrated Circuit(IC), Cu Electroplating, topography, line width, pattern density
PDF Full Text Request
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