Analysis And Design Integrated RF Front-end On 60GHz

In previous years, research on 60 GHz communication is a blank. Europe and other countries have announced their own communication bands on 60 GHz in recent years. Intel, IBM and other company have announced chips for wireless communication on 60 GHz one by one. The research of 60 GHz communication systems has profound significance with the development of technology. The communication on 60 GHz constraints by the cost and power consumption, there can be a long time before commercial.In a long time, most of the RF front-end chip is the use of GaAs technology. It is mainly due to the high cut-off frequency, low noise and high gain. With the development of wireless communication, it demands higher requirements on low cost and low power consumption. Due to the expensive price of GaAs chips, GaAs technology can not content the needs. CMOS technology has low cost, low power consumption, easy integration, etc, it become a hot research in recent years. Early CMOS technology has the low cut-off frequency, it has not been widely used. With the development of the semiconductor industry and the integrated technology, the era of deep sub-micron IC is coming, CMOS technology can be used to produce RF front-end chip.Firstly, this paper analyzes the present situation of the development of 60 GHz communication and radio frequency integrated technology, and then analysis the structure of transmitter and receiver of RF front-end.Secondly, this paper analyzes the typical products of on-chip integraed 60 GHz communication by Vubiq Company. Considering the project requirements, the costs and development cycle,this paper choose hybrid integrated technology to build 60 GHz transmitter and receiver communication system, simulates analysis the system’s feature e.g:gain, selective, phase noise, noise, path attenuation coefficient, etc.Finally, this paper analysis and design a low noise amplifier which can be used in:the hybrid integrated system.At first, according to the requirements, this paper compares different structures of low noise amplifier, considers the effect of gain, noise figure and power consumption, completes the primary design; and then uses the integrated circuit design software(Cadence IC 5141) to simulate, simulates the different input matching structures and the different TSMC CMOS process, compares the results to improve the design. Finally, designs a low noise amplifier which based on TSMC 0.13μm CMOS process and work in the hybrid integrated system, gain greater than 12 dB, noise figure less than 10 dB and power consumption less than 100 mW.