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Design Of 780MHz CMOS Low Power And Highly Efficient RF Modules For IOT Wireless Transceiver

Posted on:2016-11-11Degree:MasterType:Thesis
Country:ChinaCandidate:F Y MaoFull Text:PDF
GTID:2308330473952500Subject:Integrated circuit engineering
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With the development of technologies, Internet of Things(IOT) has been paid much attention to in a wide range. In an IOT system, numerous wireless transceiver nodes are needed to exchange information. However, the high power consumption of the wireless transceivers restricts the further development of the IOT. Low noise amplifier(LNA), as the first active stage in the receiver, provides an essential effect on the performance of the wireless transceiver. What’s more, LNA occupies large a part of the receiver’s DC power consumption. So, it carries most importance to design a LNA of high performance and to keep its power consumption lower. As to the power amplifier, it’s the most power hungry RF module in the transmitter. Therefore, highly efficient PA is very essential for a low power transmitter.In order to design low power consumption LNA and highly efficient PA, the following aspects are discussed in this paper:Firstly, the noise characters of the active and passive devices used in the CMOS process are introduced. The noise analysis method for two-port networks and the NF calculation method are also demonstrated.Secondly, various popular topologies of LNA are studied and their input impedance matching, gain, noise figure are calculated carefully. Meanwhile, the feedforward technology and noise cancelling technology are discussed, both of which are commonly used in the modern design of LNA. The PA’s main considerations and classifications are also discussed, including the advantages and disadvantages of each topology.Finally, a LNA and a PA implemented in UMC 65 nm COMS process are presented. The LNA is matched by passive impedance matching network and paralleled in common-gate stage respectively. After that, a balun-LNA is designed to realize single to double transmission. The PA’s supply voltage is controlled by a DC-DC buck to adjust its output power. To maintain high efficiency, a tunable output matching network is designed.The simulation of the LNA shows that with the 1.2 v supply voltage and passive impedance input matching network, the LNA consumes 1.32 mW DC power and provides a bandwidth from 648 MHz to 1.2 GHz. The voltage gain is 14.6 dB. The noise figure is 2.2 d B and the IIP3 is-5.2 dBm. Under the matched condition by the paralleled common-source stages, the power consumption is 1.44 mW and bandwidth is 200 MHz to 2 GHz. The voltage gain is 11.1 dB. The noise figure is 2.7 dB and the IIP3 is-3.9 dBm. The simulation of the balun-LNA shows that this balun-LNA can output well-balanced differential signals. The bandwidth is from 100 MHz to 2 GHz and the voltage gain is 19 dB. The noise figure is 4.13 dB. The simulation of the PA shows that with the 1.2 v supply voltage, it can realise an output range of 0 dBm to 9.1 dBm and the efficiency is higher than 60%.
Keywords/Search Tags:IOT, LNA, low power consumption, highly efficient PA
PDF Full Text Request
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