Research On Parallelism Of Baseband Signal Processing Algorithms Based On Multi-Core DSP

With the growing demand of computer performance, multiprocessor parallel processing is bound to become the developmental direction of computers. Meanwhile, high-speed parallel computing applications are widely used in LTE systems with the rise of SDR technology. In this thesis, related parallel processing technology and algorithms of signal processing based on multicore DSP platform are discussed in order to promote the software process of LTE.Algorithm of matrix inversion and FIR filters are widely used in LTE system. Generlly, the computational complexity of these two kinds of algorithms is bigger and the operation time of them is longer than the rest, and which could not meet the demand of the present communication systems. Therefore, adopting parallel of the two kinds of algorithms is needed.Communication overhead influences the performance of parallel algorithms at a certain extent. This thesis compares several inter-core communication mechanisms and inter-chip communication mechanisms, and finally EDMA3 and SRIO are selected to fulfill the data exchanging in parallel algorithm.For algorithm of matrix inversion, several classic algorithms are compared. Then Gauss-Jordan algorithm is chosen for parallel processing. And a parallel method for matrix inversion based on Gauss-Jordan algorithm is proposed in this thesis. Finally, the parallel algorithm of Gauss-Jordan is implemented and analysed on the TMS320C6474 EVM. The results show that the processing time of this parallel algorithm is inversely proportional to the number of processing cores. And this parallel algorithm possesses a certain speedup with a considerable number of processors.For FIR filters, several existing parallel filtering structures are compared and a deformed strcucture for FIR parallel filtering based on polyphase filter is selected and simulated in MATLAB. And this deformed parallel structure is implemented and analysed on the TMS320C6474 EVM. It shows that the processing time of this deformed parallel structure is inverselyproportional to the number of processing cores. And the results reveal that this deformed parallel structure possesses a considerable speedup.