Research On Fast Implementation Of Array Direction Finding Technology

With the development of radio technology, to find the source signal’s DOA, whether for military or civilian, has the very vital significance. Because of its multiple signal direction finding ability, super resolution direction finding ability and characteristics such as high precision and high sensitivity, the array antenna direction finding attract broad attention. After years of development, a large number of algorithms with excellent performance are produced, such as the classical ESPRIT algorithm, a subspace fitting method, the MUSIC algorithm, etc. The one dimensional direction finding algorithm is extended to two-dimensional, and produced a large number of two-dimensional spatial spectrum estimation algorithm based on array antenna direction finding. The performance of some of these algorithms is excellent, but not many practical applications, the reason is that difficult to implement, high requirements for hardware performance. So, research the array direction finding technology in the realization of the hardware platform and the problems in the practical application, has the very vital significance.The dissertation mainly studies the system of direction finding array direction finding algorithm in FPGA implementation issues:According to requirement for signal array direction finding, multi-channel synchronous and multi-channel calibration implementation on the FPGA is studied. Known from the simulation and hardware test, it meets the requirements of the array direction finding algorithm.In view of the shortcoming existing based on FPGA to realize the complex matrix eigenvalue decomposition(EVD) are need to transform the complex matrix to the real matrix, the dissertation proposes algorithm of complex conjugate symmetric matrix eigenvalue decomposition algorithm based on CORDIC-JACOBI. Upon completion of the algorithm’s derivation, the dissertation completes the algorithm simulation and gives the performance analysis.The dissertation presents six order complex conjugate symmetric matrix EVD module block diagram and hardware implementation by using System Generator, completed the function simulation and timing simulation, and tested.Finally, the dissertation improves the zero spectrum calculation method, saving the FPGA resources and improving the flexibility of using. On this basis, this article completes MUSIC algorithm implementation, the hardware simulation, and FPGA hardware tested on array signal processing system.