FPGA Implementation Of Model Predictive Controller For Electronic Throttle

Model Predictive Control has advantages over traditional control methods. It canhandle multi-variable/multi-objective problems and deal with constraints explicitly owingto its feedforward and feedback structure. Model predictive control has been widely usedin petrochemical process and some other slow process. In recent years, more and moreattention has been focused on applications of fast systems about model predictive controlsuch as vehicle electronic control, robot control and aircraft control. Therefore, this thesisstudied model predictive control in the application of electronic throttle. Because theoptimization process of model predictive control needs to solve constrained optimizationproblem at each sampling time online repeatedly, the computational process is time-consuming. In order to meet the demand of throttle control, the controller must befast with high integration. Domestic and foreign scholars improve the controller speedfrom optimization algorithms and hardware. On one hand, newer and easier algorithmsare proposed to achieve better performance of controller. On the other hand, hardwareimplementation is a good way to accelerate the controller with its parallel nature.This thesis completes the design of electronic throttle control system according tothe following steps.Firstly, it is model predictive controller design for electronic throttle. To improvethe speed of controller, interior point method is adopted to solve quadratic programmingproblem, which is time-controlled, has less iterations and easier process. Then the math-ematical model of electronic throttle is built to verify the MPC-IPM controller. Thehigh-level synthesis tool Catapult C supports input of C/C++code. Algorithm analysisis necessary to determine the matrix dimensions, the function structure and so on in inte-rior point method before writing C/C++code. Meanwhile, in order to improve the speedof the controller and reduce the occupied FPGA resources, fxed-point C code algorithmdescription is used. It requires the data range of variables in every function in ofineverifcation process.Then FPGA implementation of model predictive controller is completed. The fxed point C code is obtained after ofine simulation. Logic analysis is completed in CatapultC and fnally Catapult C gets the most appropriate solution with area occupation andcircuit performance in diferent architectures. Real-time simulation platform is built basedon FPGA and dSPACE with full hardware scheme. Meanwhile, Verilog code for serialRS232communication interface is prepared. After FPGA RTL placement and routing inQuartus II, the board-level verifcation in FPGA is performed. Finally pulse and variedstep experiments of throttle are performed, which verify the feasibility of full hardwarescheme and performance of the controller based on FPGA with high level synthesis tool.Finally physical electronic throttle control has been achieved based on FPGA andAD/DA board is used to acquire communication data. Besides, PWM board drives theelectronic throttle. Under the input signal of pulse and varied step, accelerator pedalinput signal is added. Experimental results show that MPC-IPM controller based onFPGA has a good computational performance and can meet the control performance ofelectronic throttle well.This thesis provides the detailed implementation process of the controller design,hardware implementation and physical control according to the design steps of controlsystem from the ofine to the physical control. However, there are still some problemsin the design process, such as some nonlinear factors which are difcult to measure anddeduce in electronic throttle model are ignored in the modeling process. But the actualelectronic throttle is a complex system with nonlinear characters. Thus the dynamicperformance remains to be further improved and the error of input and output signalsneed to be reduced to achieve more satisfactory control performance. In addition, themore direct design method is written by the users with Verilog HDL code which is easyto debug. We can write the Verilog HDL code in the next step to improve the flexibilityof the controller.