FPGA Implementation And Application Of Fast Model Predictive Control

Owing to its ability to handle multi-variable/multi-objective problems and deal withhard constraints explicitly, model predictive control (MPC) has become an attractivefeedback strategy in a broad range of systems, and its application has been extendedfrom process industry systems to fast dynamic systems. Due to MPC requires repeatedonline solution of a receding horizon optimization problem at every sampling instant,the computation load remains the main challenge for the real-time practical applicationof MPC especially for fast systems. Moreover, fast systems require the MPC controllerto be high computational performance, miniaturization and high-level integration on achip. Therefore, online solution of optimization problem and hardware implementationof MPC controller are two critical open issues for MPC applications. This thesis mainlystudies the field programmable gate array (FPGA) implementation and application offast model predictive control, and aims at lowering the practical burden of applying fastMPC algorithms in the real-world.In order to improve the computational efciency of MPC, the first part of this the-sis focuses on efciently solving optimization problems as arising in MPC. This thesisproposes a constrained particle swarm optimization (PSO) method. Firstly, the compu-tational formula and detailed calculation steps of basic PSO are given. Secondly, penaltyfunction approach is employed to deal with system constrains. In combination withsimple iteration and parallel computation of basic PSO, the constrained particle swarmmethod has the ability to solve optimization problems quickly. Finally, linear and nonlin-ear simulation tests of MPC are performed to verify the availability of the proposed PSOmethod and to compare the computational performance of these optimization methods.Simulation results show the availability of these algorithm. The comparative analysis ofconstrained PSO and commonly used optimization algorithms provides theoretical basisfor hardware implementation.Considering with the demands of fast dynamic systems, hardware implementationschemes for MPC on FPGA chip are proposed to meet these requirements. This scheme uses FPGA to explore the possibilities of pipelined architecture and parallel hardware forthe substantial acceleration of MPC. Firstly, an embedded implementation scheme basedon FPGA and system on a programmable chip (SoPC) technology is presented. A Nios IIsoft core processor is embedded into the FPGA chip and then the hardware and softwaresystem of SoPC are designed. The computational efciency of time-critical arithmeticoperations is enhanced by designing custom instructions of float-point operations andcustom hardware accelerators of matrix operations. This scheme consumes few hardwareresources and is very flexible to be extended and updated. Secondly, a full hardwareimplementation method on FPGA is given, and semi-automatic modular method is usedto design MPC controller on FPGA. Based on algorithm analysis, MPC algorithm can beoptimized by parallelism-loop unrolling and pipelining to obtain fast online computationalspeed. Compared to the embedded scheme, this full hardware implementation methodhas better computational efciency, but it consumes more hardware resources. Finally,numerical examples implemented on FPGA are performed to analyze the computationalperformance between these two hardware implementation schemes.For purpose of realizing real-time practical application of MPC, we apply linear modelpredictive control (LMPC) to the electronic throttle control system and real-time test isperformed. According to throttle structure, we establish a control-oriented mathemat-ical model of electronic throttle and give the control requirements of throttle control.Based on the established model, a LMPC controller is designed and active set, interiorpoint and constrained PSO methods are utilized to solve the optimization problem respec-tively. The computational performance of these three optimization methods are comparedand analyzed through ofine simulation tests. The ofine simulation results show thatthese optimization methods can achieve satisfactory control efect, but can not meet thereal-time computational requirement of1ms sampling time. Therefore, the hardware ac-celeration method based on FPGA is utilized to further enhance the computational speed.Then LMPC controller with active set method implemented by embedded FPGA schemeand LMPC controller with PSO method implemented by FPGA full hardware schemeare designed respectively. For the validation of these two LMPC controllers, we buildup a prototyping platform. The real-time experiment results demonstrate that these twoLMPC controllers implemented on FPGA have good computational performance and canachieve satisfactory control performance of electronic throttle.Due to many systems are inherently nonlinear, linear models are unsuitable to de-scribe the nonlinear process dynamics. It motivates the increasing interest in nonlinearmodel predictive control (NMPC). Therefore the application of NMPC in engine idle speedcontrol problem is investigated. With the established nonlinear engine model, we design a NMPC controller for idle speed control and use sequential quadratic programming (SQP)and PSO methods to solve the NLP problem formed by NMPC. The ofine simulationresults indicate that the NMPC controller has good control efect, but can not obtain thesolutions within20ms sampling interval. With the help of pipelined architecture and par-allel hardware of FPGA, the computational efciency of NMPC controller is substantiallyincreased by using parallelism-loop unrolling and pipelining process. Finally the con-structed engine model and the high precision enDYNA engine model are used to validatethe efciency of the designed controller. The real-time experimental results demonstratethat the NMPC controller implemented on FPGA reduces the computational time from31.738ms to2.34ms. Therefore, the designed NMPC controller has good computationalperformance and achieves satisfactory performance for engine idle speed control problem.This study provides the experimental basis for in-vehicle tests.In this paper, we not only present the detailed derivation process of efciently solvingoptimization methods, but also give the hardware implementation process of the MPCcontroller in detail. To validate the efectiveness of the proposed methods, we performthe real-time experiments of electronic throttle control and engine idle speed control re-spectively, and give experiment results and analysis. The results demonstrate that theproposed optimization methods and hardware implementation schemes have good com-putational performance, and make model predictive control apply to automobile controlsystem successfully. There are some topics that still remain to be studied, further researchwork includes:(1) The convergence of constrained PSO method needs to be studied;(2)The automatically generated circuit has more resource consumption and is not as ef-cient as that in manual design, so new FPGA implementation method based on hardwaredescription language designed by manual should be researched;(3) We only performedhardware-in-the-loop experiments until now, in-vehicle tests should be carried out in thefuture.