Font Size: a A A

The Logic Design Of A Distributed Radar’s Timing Control And Channel Correction

Posted on:2015-05-17Degree:MasterType:Thesis
Country:ChinaCandidate:B J XiaFull Text:PDF
GTID:2308330464966823Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
In recent years, more and more country equiped with stealth arms, so enhanceing the research of stealth and anti-stealth technology becomes more necessary. According to the research, meterwave MIMO radar has a good effect on anti-stealth, but the meterwave MIMO radar has many disadvantages, such as narrow bandwidth, wide beam, small angle resolution and small positioning accuracy, these disadvantages make the accuracy not satisfied with the guidance demand. To increase the antenna aperture can improve the detect accuracy, but increase the antenna aperture will decrease the motility of radar. This is not satisfied with the high detect accuracy and motility that the modern radar demand. Distributed Subarray VHF radar was appeared under this situation. Distributed Subarray VHF radar has several distributed subarrays which aperture are very small, every subarray can be placed in different places depend on demand, and these subarrays can work alone or together, when work together through coherence- synthetic can gain the effect of big-pore antenna array radar detection.The main study of this thesis is use a FPGA chip as the controller complete the logic design and realize of the distributed subarray VHF radar’s timing control board. Firstly, introduce the research background and current situation; Secondly, introduce the basic concept of coherence-synthetic radar and introduce the hardware structure of timing control board, this system use FPGA chip as the major controller, using fiber and network interface to communication with DAM, signal processing board, data collecting computer and control interface; Thirdly, introduce the logic design of the timing control board and the debug result in detail, the system have seven work modes, respectively imitate target mode, receive adjust mode, emission adjust mode, equal T search mode, change T search mode, change frequency mode, phase encode mode; Finally, introduce the transceiver channel’s amplitude and phase error correction for the distributed subarrays VHF radar, the digital array radar’s transceiver channel always have same inconsistency in amplitude and phase, these inconsistency have big effect to the radar detect result. The system use an adjust network to connect the distributed subarrays and make unite adjust. Actual debug results indicate, this design is simple and effective, can realize the timing control of distributed subarray VHF radar, and the method of transceiver channel’s amplitude and phase error correction are introduced in the thesis that can overcome the inconsistency well, has good significance to distributed subarray VHF radar design.
Keywords/Search Tags:distributed, timing control, FPGA, channel error correction, anti-stealth
PDF Full Text Request
Related items