A Hardware Prallel Design Of BING

With the rapid development of computer vision,target recognition as one of the most important research fields has also achieved great development in recent years. The recongnition rate has improved constantly with new algorithms. But all the algorithms are highly complex and have a slow processing speed, that because sliding window used in recongnition algorithm has becomed one of the bottlenecks. So most of target recognition methods can not be used in real time system.To solve this problem, a new method is proposed by Jasper Uijlings. Adding a pre-reatment before recognition, it will provide some proposals which may contain objects and could replace the sliding window. Ming Ming Cheng, a researcher from china, puts forward a new method to generate proposals in his paper on CVPR2014. It can achieve the accuracy rate of 96% and processing speed at 300 fps tested on VOC2007.In BING, the size of detection window is 8 ′ 8, because the longest data type on computer is 64 bits, the binarized normed gradients can store in type of int64. But when some images are too big or too small in size, the detection window of 8 ′ 8 may not estimate objects accurately. So,in this paper, I put forward a method that using dynamic windows instead of a fixed one. Adding some assisted detection window in different size to avoid mistakes.The images in VOC2007 are low resolution, most of them are 400*500, so it can process at the speed of 300 fps. But now, image or video have a higher and higher resolution, in this case, BING can not reach the high processing speed. On the other hand, BING can achieve a good performance in speed, only executing on a high-powered PC. After a in-depth research, I find that the different bits of BING feature are put on corresponging bit-planes and calculate independently. To deal with these drawbacks and use the distingguishing feature, the paper proposes a parallel design on hardware. Each bit-plane can calculate simultaneously and take advantage of pipeline to improve the system’s throughput. On the one hand, it can make full use of the efficient of FPGA to process HD image. On the other hand, it can work onlow-power equipment and expand the scope of application.