Implementation Of Muti-node Data Transmission Based On POE

In this paper,through the theoretical analysis and application of composition of POE system,Ethernet protocol and packet to send or receive,carry on a multi-node data transmission scheme based on FPGA.Using Ethernet as network transmission mode for data packets to send.This design uses Altera’s Cyclone Ⅳ series chip EPCE10E22C8 N as system controller chip and use POE switchers provide 48 V power role as power supply devices,meanwhile use QuartusⅡ13.1 as development tool.The entire project use top-down design method and Verilog HDL is used to complete all of the modules.The hardware platform build itself,Modelsim is adopted to verify the design results.The design can be divided into two parts.One is hardware circuit design,the choose of FPGA chips and physical chips as well as Ethernet frame interface circuit design.The physical layer chip by comparing with two of the most commonly used chip final choice DM9000 A to complete this section function.Ethernet interface circuit design consist of power clock design,chip configuration design and RJ45 interface design.Using Altium Designer software to design schematic and PCB while introducing POE switchs play the role of power supply.The other part is FPGA software design which can be divided into specific module :time node module,frame generate module,control module.Control module subdivided into initialization,receiving,sending and configuration modules.At last,the whole design is downloaded to the hardware system to verify.After the actual board level validation,we capture the data packers through IP tool.Comparing with the data which is ready to send,Although there were certain packet loss rate,but basically competed the overall transfer function.