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Short Critical Area Model And Extraction Algorithm Based On Defects’ Features

Posted on:2015-11-03Degree:MasterType:Thesis
Country:ChinaCandidate:R P FengFull Text:PDF
GTID:2308330464470081Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the constant enlargement of the scale of integrated circuits and the constant shrink of the feature size of devices, defects on the layouts increasingly affect the performance of integrated circuits. The sensitivity degree of integrated circuits to defects is described by circuit area. In recent years, research on critical area has become the core of layout optimization and yield estimation of integrated circuits. Among the algorithms of critical area extraction, the algorithm bound to mathematical morphology gets wide attention for low time complexity, high accuracy and wide usage scenarios. The calculation model and the extraction algorithm of short critical area are deeply studied in this dissertation. The major contributions are outlined as follows: 1. The calculation models of short critical area are studied. To resolve short faults caused by redundant defects, a new model to extract short critical area based on defects is proposed in this paper under the study of the features of defects and existed calculation models. The completion process of dilation operation is combined with this model. Meanwhile, the features of defects and nets are considered and the time of short critical area computation can be reduced. 2. According to the new model, the relevant extraction algorithm is designed and completed. The general process is as follows: firstly, the feature sizes of defects and the range of every net of the layout are extracted. Secondly, the relationship of the feature sizes of defects and the range of every net is determined. Thirdly, short critical area is extracted on the basic of the relationship and the specific completion process of dilation operation. 3. The applications of the algorithm are studied. The algorithm not only can be used to extract short critical area, but also can be used to optimize layout design. The experimental results on the large layouts OpenSparc and MUSB L70 show the feasibility, practicability and efficiency of the model and the algorithm.
Keywords/Search Tags:integrated circuits, critical area, mathematical morphology, redundant defects
PDF Full Text Request
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