Design Of H.264 Intra Coding Algorithm-hardening Based On Handel-C Programming Language

As the development of information technology, human society has an increasing demand on multimedia especially video, and the application of video has developed rapidly on domain of conferences and web video click. The data size has been increasing largely because of the increasing of the quantity and quality of the video. At the same time, the network bandwidth and the memory space is limited, so how to store and transmit video with high-efficiency has been a significant problem to the real-time video processing.We can use fewer resources when store and transmit video by using H.264 technology in a high compression ratio, but the high compression ratio we get via H.264 is got by a large number of calculations, the running time of the system will increase. Now, the development of FPGAs has provided a good solution to the real-time video processing. Platforms like FPGAs have provide a good condition to the parallel processing due to the characteristics of high speed, low price and plenty logic resources.This paper researches the H.264 video coding standard and the theory of it, and specially analyses the main technology in VLC layer and the key technology that influence the coding efficiency, then introduces the algorithms that are realized and the method used in this paper. Then the key problems in the design is been cleared. At last, Handel-C hardware language and the design method on FPGAs are presented. As this language can make rapid design, gets a simple code and is suitable for software engineers, it is been used to design H.264 intra predicting and coding in this paper.Then, according to the internal structure and the operating principle, the algorithm and design flow are analyzed, and the hardware structure and function module interface is been designed. The main function modules in H.264 intra coding is detailed designed in Handel-C language, include the 16x16 block, 4x4 block and 8x8 block, the integer transform and the quantization modules. Then they are made together to realize the mode selection and prediction and reconstruction. At last, the efficiency of the algorithm is improved by taking advantage of the parallelization of Handel-C.The result of the experiment shows that we can do H.264 video compression algorithm and achieve a good operational performance with Handel-C, the feasibility of hardware design of algorithms by Handel-C is verified. This paper and work have a certain reference significance to the future researches and designs on hardware design of algorithms with Handel-C language and the hardware design of H.264.