Design Of FPGA-based HEVC Intra Prediction Acceleration Module

With the improvement of social needs,the video resolution is developing from 720 P and 1080 P to 2K and 4K,and the video frame rate has gradually increased.In addition to the improvement of resolution and frame rate,people have higher requirements on the real-time nature of video images.The above requirements put forward higher requirements for video compression algorithms.Currently,the mainstream H.264 compression standard has failed,and the new generation of video compression standard HEVC has improved about 40%-50% compared to H.264 compression efficiency.It will take on the responsibility of the next generation of video compression.HEVC has a significant increase in compression efficiency,but the complexity of the algorithm has also greatly increased.Among them,the increase in the complexity of the intraprediction part of the algorithm is a very important factor.Therefore,the optimization and implementation of intra-prediction algorithms are currently the hot topics.The complexity of intra prediction is mainly reflected in two aspects.The first is the division of prediction units.The prediction unit of HEVC has 5 sizes of 4×4 to 64×64,while the prediction unit of H.264 has only 4×4 and 16 × 16.Second,HEVC defines 35 intra prediction modes for each prediction unit,while H.264 has only 9 intra prediction modes.Therefore,the optimization of the HEVC intra prediction part can be started from these two aspects.The main research contents of this paper include: HEVC intra-frame prediction algorithm optimization and FPGA implementation of optimization algorithm.(1)Algorithm optimization level: “sobel+SATD” is used for making decisions.Firstly,a gradient algorithm based on sobel operator is used to decide the prediction unit division and the best angle prediction mode.Then use the SATD cost function to judge the best angle prediction mode,DC mode,and Planar mode to obtain the optimal prediction mode.(2)FPGA implementation level: The hardware architecture of “multilayer pipeline + parallel processing unit” is adopted.A multi-layer pipeline is used to optimize the intraprediction operation timing of each step,and a parallel processing unit is used to accelerate the calculation of the pixel gradient and the direction change rate.When the optimization algorithm is correctly implemented,the calculation speed of the intra prediction link is greatly improved.Experimental results show that this design can meet the video coding task of 2560×1600@31fps or 1920×1080@62fps.Compared with HM16.7,the design reduces the intra-prediction running time by approximately 33.44% while ensuring the image quality and compression rate.Compared with other intra-prediction optimization schemes,this scheme also has a good effect on intra-frame prediction accuracy and calculation speed.